hw/char: QOM'ify lm32_uart.c
* Drop the old SysBus init function and use instance_init * Call qemu_chr_add_handlers in the realize callback * Use qdev chardev prop instead of qemu_char_get_next_serial * Add lm32_uart_create function to create lm32 uart device Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Message-Id: <1464158344-12266-5-git-send-email-zxq_yx_007@163.com> Tested-by: Michael Walle <michael@walle.cc> Acked-by: Michael Walle <michael@walle.cc> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -249,23 +249,25 @@ static void uart_reset(DeviceState *d)
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s->regs[R_LSR] = LSR_THRE | LSR_TEMT;
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s->regs[R_LSR] = LSR_THRE | LSR_TEMT;
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}
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}
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static int lm32_uart_init(SysBusDevice *dev)
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static void lm32_uart_init(Object *obj)
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{
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{
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LM32UartState *s = LM32_UART(dev);
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LM32UartState *s = LM32_UART(obj);
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SysBusDevice *dev = SYS_BUS_DEVICE(obj);
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sysbus_init_irq(dev, &s->irq);
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sysbus_init_irq(dev, &s->irq);
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memory_region_init_io(&s->iomem, OBJECT(s), &uart_ops, s,
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memory_region_init_io(&s->iomem, obj, &uart_ops, s,
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"uart", R_MAX * 4);
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"uart", R_MAX * 4);
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sysbus_init_mmio(dev, &s->iomem);
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sysbus_init_mmio(dev, &s->iomem);
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}
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static void lm32_uart_realize(DeviceState *dev, Error **errp)
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{
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LM32UartState *s = LM32_UART(dev);
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/* FIXME use a qdev chardev prop instead of qemu_char_get_next_serial() */
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s->chr = qemu_char_get_next_serial();
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if (s->chr) {
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if (s->chr) {
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qemu_chr_add_handlers(s->chr, uart_can_rx, uart_rx, uart_event, s);
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qemu_chr_add_handlers(s->chr, uart_can_rx, uart_rx, uart_event, s);
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}
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}
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return 0;
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}
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}
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static const VMStateDescription vmstate_lm32_uart = {
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static const VMStateDescription vmstate_lm32_uart = {
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@ -278,22 +280,26 @@ static const VMStateDescription vmstate_lm32_uart = {
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}
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}
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};
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};
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static Property lm32_uart_properties[] = {
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DEFINE_PROP_CHR("chardev", LM32UartState, chr),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void lm32_uart_class_init(ObjectClass *klass, void *data)
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static void lm32_uart_class_init(ObjectClass *klass, void *data)
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{
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
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k->init = lm32_uart_init;
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dc->reset = uart_reset;
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dc->reset = uart_reset;
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dc->vmsd = &vmstate_lm32_uart;
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dc->vmsd = &vmstate_lm32_uart;
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/* Reason: init() method uses qemu_char_get_next_serial() */
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dc->props = lm32_uart_properties;
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dc->cannot_instantiate_with_device_add_yet = true;
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dc->realize = lm32_uart_realize;
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}
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}
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static const TypeInfo lm32_uart_info = {
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static const TypeInfo lm32_uart_info = {
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.name = TYPE_LM32_UART,
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.name = TYPE_LM32_UART,
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.parent = TYPE_SYS_BUS_DEVICE,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(LM32UartState),
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.instance_size = sizeof(LM32UartState),
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.instance_init = lm32_uart_init,
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.class_init = lm32_uart_class_init,
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.class_init = lm32_uart_class_init,
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};
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};
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@ -27,4 +27,20 @@ static inline DeviceState *lm32_juart_init(CharDriverState *chr)
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return dev;
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return dev;
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}
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}
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static inline DeviceState *lm32_uart_create(hwaddr addr,
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qemu_irq irq,
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CharDriverState *chr)
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{
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DeviceState *dev;
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SysBusDevice *s;
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dev = qdev_create(NULL, "lm32-uart");
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s = SYS_BUS_DEVICE(dev);
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qdev_prop_set_chr(dev, "chardev", chr);
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qdev_init_nofail(dev);
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sysbus_mmio_map(s, 0, addr);
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sysbus_connect_irq(s, 0, irq);
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return dev;
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}
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#endif
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#endif
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@ -132,7 +132,7 @@ static void lm32_evr_init(MachineState *machine)
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irq[i] = qdev_get_gpio_in(env->pic_state, i);
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irq[i] = qdev_get_gpio_in(env->pic_state, i);
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}
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}
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sysbus_create_simple("lm32-uart", uart0_base, irq[uart0_irq]);
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lm32_uart_create(uart0_base, irq[uart0_irq], serial_hds[0]);
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sysbus_create_simple("lm32-timer", timer0_base, irq[timer0_irq]);
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sysbus_create_simple("lm32-timer", timer0_base, irq[timer0_irq]);
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sysbus_create_simple("lm32-timer", timer1_base, irq[timer1_irq]);
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sysbus_create_simple("lm32-timer", timer1_base, irq[timer1_irq]);
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@ -233,7 +233,7 @@ static void lm32_uclinux_init(MachineState *machine)
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irq[i] = qdev_get_gpio_in(env->pic_state, i);
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irq[i] = qdev_get_gpio_in(env->pic_state, i);
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}
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}
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sysbus_create_simple("lm32-uart", uart0_base, irq[uart0_irq]);
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lm32_uart_create(uart0_base, irq[uart0_irq], serial_hds[0]);
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sysbus_create_simple("lm32-timer", timer0_base, irq[timer0_irq]);
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sysbus_create_simple("lm32-timer", timer0_base, irq[timer0_irq]);
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sysbus_create_simple("lm32-timer", timer1_base, irq[timer1_irq]);
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sysbus_create_simple("lm32-timer", timer1_base, irq[timer1_irq]);
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sysbus_create_simple("lm32-timer", timer2_base, irq[timer2_irq]);
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sysbus_create_simple("lm32-timer", timer2_base, irq[timer2_irq]);
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