tests/tcg/aarch64: Explicitly specify register width
clang version 18.1.6 assumes a register is 64-bit by default and complains if a 32-bit value is given. Explicitly specify register width when passing a 32-bit value. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240627-tcg-v2-3-1690a813348e@daynix.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-5-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-10-alex.bennee@linaro.org>
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@ -17,15 +17,15 @@ static void skip2_sigill(int sig, siginfo_t *info, ucontext_t *uc)
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#define BTI_JC "hint #38"
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#define BTYPE_1(DEST) \
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asm("mov %0,#1; adr x16, 1f; br x16; 1: " DEST "; mov %0,#0" \
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asm("mov %w0,#1; adr x16, 1f; br x16; 1: " DEST "; mov %w0,#0" \
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: "=r"(skipped) : : "x16")
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#define BTYPE_2(DEST) \
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asm("mov %0,#1; adr x16, 1f; blr x16; 1: " DEST "; mov %0,#0" \
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asm("mov %w0,#1; adr x16, 1f; blr x16; 1: " DEST "; mov %w0,#0" \
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: "=r"(skipped) : : "x16", "x30")
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#define BTYPE_3(DEST) \
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asm("mov %0,#1; adr x15, 1f; br x15; 1: " DEST "; mov %0,#0" \
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asm("mov %w0,#1; adr x15, 1f; br x15; 1: " DEST "; mov %w0,#0" \
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: "=r"(skipped) : : "x15")
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#define TEST(WHICH, DEST, EXPECT) \
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@ -11,15 +11,15 @@ static void skip2_sigill(int sig, siginfo_t *info, ucontext_t *uc)
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}
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#define BTYPE_1() \
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asm("mov %0,#1; adr x16, 1f; br x16; 1: hint #25; mov %0,#0" \
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asm("mov %w0,#1; adr x16, 1f; br x16; 1: hint #25; mov %w0,#0" \
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: "=r"(skipped) : : "x16", "x30")
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#define BTYPE_2() \
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asm("mov %0,#1; adr x16, 1f; blr x16; 1: hint #25; mov %0,#0" \
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asm("mov %w0,#1; adr x16, 1f; blr x16; 1: hint #25; mov %w0,#0" \
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: "=r"(skipped) : : "x16", "x30")
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#define BTYPE_3() \
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asm("mov %0,#1; adr x15, 1f; br x15; 1: hint #25; mov %0,#0" \
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asm("mov %w0,#1; adr x15, 1f; br x15; 1: hint #25; mov %w0,#0" \
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: "=r"(skipped) : : "x15", "x30")
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#define TEST(WHICH, EXPECT) \
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