x86/lapic: Load LAPIC state at post_load
Load the LAPIC state during post_load (rather than when the CPU starts). This allows an interrupt to be delivered from the ioapic to the lapic prior to cpu loading, in particular the RTC that starts ticking as soon as we load it's state. Fixes a case where Windows hangs after migration due to RTC interrupts disappearing. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -28,9 +28,8 @@ static inline uint32_t kvm_apic_get_reg(struct kvm_lapic_state *kapic,
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return *((uint32_t *)(kapic->regs + (reg_id << 4)));
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}
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void kvm_put_apic_state(DeviceState *dev, struct kvm_lapic_state *kapic)
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static void kvm_put_apic_state(APICCommonState *s, struct kvm_lapic_state *kapic)
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{
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APICCommonState *s = APIC_COMMON(dev);
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int i;
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memset(kapic, 0, sizeof(*kapic));
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@ -125,6 +124,27 @@ static void kvm_apic_vapic_base_update(APICCommonState *s)
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}
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}
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static void kvm_apic_put(void *data)
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{
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APICCommonState *s = data;
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struct kvm_lapic_state kapic;
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int ret;
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kvm_put_apic_state(s, &kapic);
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ret = kvm_vcpu_ioctl(CPU(s->cpu), KVM_SET_LAPIC, &kapic);
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if (ret < 0) {
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fprintf(stderr, "KVM_SET_LAPIC failed: %s\n", strerror(ret));
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abort();
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}
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}
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static void kvm_apic_post_load(APICCommonState *s)
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{
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fprintf(stderr, "%s: Yeh\n", __func__);
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run_on_cpu(CPU(s->cpu), kvm_apic_put, s);
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}
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static void do_inject_external_nmi(void *data)
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{
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APICCommonState *s = data;
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@ -178,6 +198,8 @@ static void kvm_apic_reset(APICCommonState *s)
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{
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/* Not used by KVM, which uses the CPU mp_state instead. */
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s->wait_for_sipi = 0;
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run_on_cpu(CPU(s->cpu), kvm_apic_put, s);
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}
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static void kvm_apic_realize(DeviceState *dev, Error **errp)
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@ -206,6 +228,7 @@ static void kvm_apic_class_init(ObjectClass *klass, void *data)
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k->set_base = kvm_apic_set_base;
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k->set_tpr = kvm_apic_set_tpr;
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k->get_tpr = kvm_apic_get_tpr;
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k->post_load = kvm_apic_post_load;
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k->enable_tpr_reporting = kvm_apic_enable_tpr_reporting;
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k->vapic_base_update = kvm_apic_vapic_base_update;
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k->external_nmi = kvm_apic_external_nmi;
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@ -371,7 +371,6 @@ int kvm_irqchip_send_msi(KVMState *s, MSIMessage msg);
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void kvm_irqchip_add_irq_route(KVMState *s, int gsi, int irqchip, int pin);
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void kvm_put_apic_state(DeviceState *d, struct kvm_lapic_state *kapic);
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void kvm_get_apic_state(DeviceState *d, struct kvm_lapic_state *kapic);
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struct kvm_guest_debug;
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@ -2416,19 +2416,6 @@ static int kvm_get_apic(X86CPU *cpu)
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return 0;
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}
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static int kvm_put_apic(X86CPU *cpu)
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{
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DeviceState *apic = cpu->apic_state;
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struct kvm_lapic_state kapic;
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if (apic && kvm_irqchip_in_kernel()) {
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kvm_put_apic_state(apic, &kapic);
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return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_LAPIC, &kapic);
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}
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return 0;
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}
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static int kvm_put_vcpu_events(X86CPU *cpu, int level)
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{
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CPUState *cs = CPU(cpu);
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@ -2670,10 +2657,6 @@ int kvm_arch_put_registers(CPUState *cpu, int level)
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if (ret < 0) {
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return ret;
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}
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ret = kvm_put_apic(x86_cpu);
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if (ret < 0) {
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return ret;
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}
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}
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ret = kvm_put_tscdeadline_msr(x86_cpu);
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