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Add v{add,sub}u{b,h,w}m instructions.

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Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6155 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32 2009-01-03 13:31:40 +00:00
parent 8e27dd6f09
commit 7872c51c1a
3 changed files with 32 additions and 0 deletions
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9
target-ppc/helper.h
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@ -96,6 +96,15 @@ DEF_HELPER_1(fres, i64, i64)
DEF_HELPER_1(frsqrte, i64, i64) DEF_HELPER_1(frsqrte, i64, i64)
DEF_HELPER_3(fsel, i64, i64, i64, i64) DEF_HELPER_3(fsel, i64, i64, i64, i64)
#define dh_alias_avr ptr
#define dh_ctype_avr ppc_avr_t *
DEF_HELPER_3(vaddubm, void, avr, avr, avr)
DEF_HELPER_3(vadduhm, void, avr, avr, avr)
DEF_HELPER_3(vadduwm, void, avr, avr, avr)
DEF_HELPER_3(vsububm, void, avr, avr, avr)
DEF_HELPER_3(vsubuhm, void, avr, avr, avr)
DEF_HELPER_3(vsubuwm, void, avr, avr, avr)
DEF_HELPER_1(efscfsi, i32, i32) DEF_HELPER_1(efscfsi, i32, i32)
DEF_HELPER_1(efscfui, i32, i32) DEF_HELPER_1(efscfui, i32, i32)
DEF_HELPER_1(efscfuf, i32, i32) DEF_HELPER_1(efscfuf, i32, i32)

17
target-ppc/op_helper.c
View File

@ -1971,6 +1971,23 @@ target_ulong helper_dlmzb (target_ulong high, target_ulong low, uint32_t update_
for (index = ARRAY_SIZE(r->element)-1; index >= 0; index--) for (index = ARRAY_SIZE(r->element)-1; index >= 0; index--)
#endif #endif
#define VARITH_DO(name, op, element) \
void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
{ \
int i; \
for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
r->element[i] = a->element[i] op b->element[i]; \
} \
}
#define VARITH(suffix, element) \
VARITH_DO(add##suffix, +, element) \
VARITH_DO(sub##suffix, -, element)
VARITH(ubm, u8)
VARITH(uhm, u16)
VARITH(uwm, u32)
#undef VARITH_DO
#undef VARITH
#undef VECTOR_FOR_INORDER_I #undef VECTOR_FOR_INORDER_I
#undef HI_IDX #undef HI_IDX
#undef LO_IDX #undef LO_IDX

6
target-ppc/translate.c
View File

@ -6181,6 +6181,12 @@ GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC) \
tcg_temp_free_ptr(rd); \ tcg_temp_free_ptr(rd); \
} }
GEN_VXFORM(vaddubm, 0, 0);
GEN_VXFORM(vadduhm, 0, 1);
GEN_VXFORM(vadduwm, 0, 2);
GEN_VXFORM(vsububm, 0, 16);
GEN_VXFORM(vsubuhm, 0, 17);
GEN_VXFORM(vsubuwm, 0, 18);
/*** SPE extension ***/ /*** SPE extension ***/
/* Register moves */ /* Register moves */