hw/dma/xlnx-zdma Always expect 'dma' link property to be set
Simplify by always passing a MemoryRegion property to the device. Doing so we can move the AddressSpace field to the device struct, removing need for heap allocation. Update the Xilinx ZynqMP / Versal SoC models to pass the default system memory instead of a NULL value. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20210819163422.2863447-5-philmd@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -218,6 +218,8 @@ static void versal_create_admas(Versal *s, qemu_irq *pic)
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TYPE_XLNX_ZDMA);
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TYPE_XLNX_ZDMA);
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dev = DEVICE(&s->lpd.iou.adma[i]);
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dev = DEVICE(&s->lpd.iou.adma[i]);
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object_property_set_int(OBJECT(dev), "bus-width", 128, &error_abort);
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object_property_set_int(OBJECT(dev), "bus-width", 128, &error_abort);
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object_property_set_link(OBJECT(dev), "dma",
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OBJECT(get_system_memory()), &error_fatal);
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sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
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sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
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mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
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mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
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@ -601,6 +601,10 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
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errp)) {
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errp)) {
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return;
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return;
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}
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}
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if (!object_property_set_link(OBJECT(&s->gdma[i]), "dma",
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OBJECT(system_memory), errp)) {
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return;
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}
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->gdma[i]), errp)) {
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->gdma[i]), errp)) {
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return;
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return;
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}
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}
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@ -611,6 +615,10 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
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}
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}
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for (i = 0; i < XLNX_ZYNQMP_NUM_ADMA_CH; i++) {
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for (i = 0; i < XLNX_ZYNQMP_NUM_ADMA_CH; i++) {
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if (!object_property_set_link(OBJECT(&s->adma[i]), "dma",
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OBJECT(system_memory), errp)) {
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return;
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}
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->adma[i]), errp)) {
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->adma[i]), errp)) {
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return;
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return;
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}
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}
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@ -320,9 +320,9 @@ static bool zdma_load_descriptor(XlnxZDMA *s, uint64_t addr,
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return false;
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return false;
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}
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}
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descr->addr = address_space_ldq_le(s->dma_as, addr, s->attr, NULL);
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descr->addr = address_space_ldq_le(&s->dma_as, addr, s->attr, NULL);
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descr->size = address_space_ldl_le(s->dma_as, addr + 8, s->attr, NULL);
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descr->size = address_space_ldl_le(&s->dma_as, addr + 8, s->attr, NULL);
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descr->attr = address_space_ldl_le(s->dma_as, addr + 12, s->attr, NULL);
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descr->attr = address_space_ldl_le(&s->dma_as, addr + 12, s->attr, NULL);
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return true;
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return true;
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}
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}
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@ -354,7 +354,7 @@ static void zdma_update_descr_addr(XlnxZDMA *s, bool type,
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} else {
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} else {
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addr = zdma_get_regaddr64(s, basereg);
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addr = zdma_get_regaddr64(s, basereg);
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addr += sizeof(s->dsc_dst);
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addr += sizeof(s->dsc_dst);
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next = address_space_ldq_le(s->dma_as, addr, s->attr, NULL);
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next = address_space_ldq_le(&s->dma_as, addr, s->attr, NULL);
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}
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}
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zdma_put_regaddr64(s, basereg, next);
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zdma_put_regaddr64(s, basereg, next);
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@ -421,7 +421,7 @@ static void zdma_write_dst(XlnxZDMA *s, uint8_t *buf, uint32_t len)
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}
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}
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}
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}
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address_space_write(s->dma_as, s->dsc_dst.addr, s->attr, buf, dlen);
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address_space_write(&s->dma_as, s->dsc_dst.addr, s->attr, buf, dlen);
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if (burst_type == AXI_BURST_INCR) {
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if (burst_type == AXI_BURST_INCR) {
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s->dsc_dst.addr += dlen;
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s->dsc_dst.addr += dlen;
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}
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}
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@ -497,7 +497,7 @@ static void zdma_process_descr(XlnxZDMA *s)
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len = s->cfg.bus_width / 8;
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len = s->cfg.bus_width / 8;
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}
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}
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} else {
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} else {
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address_space_read(s->dma_as, src_addr, s->attr, s->buf, len);
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address_space_read(&s->dma_as, src_addr, s->attr, s->buf, len);
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if (burst_type == AXI_BURST_INCR) {
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if (burst_type == AXI_BURST_INCR) {
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src_addr += len;
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src_addr += len;
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}
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}
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@ -765,6 +765,12 @@ static void zdma_realize(DeviceState *dev, Error **errp)
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XlnxZDMA *s = XLNX_ZDMA(dev);
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XlnxZDMA *s = XLNX_ZDMA(dev);
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unsigned int i;
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unsigned int i;
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if (!s->dma_mr) {
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error_setg(errp, TYPE_XLNX_ZDMA " 'dma' link not set");
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return;
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}
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address_space_init(&s->dma_as, s->dma_mr, "zdma-dma");
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for (i = 0; i < ARRAY_SIZE(zdma_regs_info); ++i) {
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for (i = 0; i < ARRAY_SIZE(zdma_regs_info); ++i) {
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RegisterInfo *r = &s->regs_info[zdma_regs_info[i].addr / 4];
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RegisterInfo *r = &s->regs_info[zdma_regs_info[i].addr / 4];
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@ -777,12 +783,6 @@ static void zdma_realize(DeviceState *dev, Error **errp)
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};
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};
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}
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}
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if (s->dma_mr) {
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s->dma_as = g_malloc0(sizeof(AddressSpace));
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address_space_init(s->dma_as, s->dma_mr, NULL);
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} else {
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s->dma_as = &address_space_memory;
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}
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s->attr = MEMTXATTRS_UNSPECIFIED;
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s->attr = MEMTXATTRS_UNSPECIFIED;
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}
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}
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@ -56,7 +56,7 @@ struct XlnxZDMA {
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MemoryRegion iomem;
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MemoryRegion iomem;
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MemTxAttrs attr;
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MemTxAttrs attr;
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MemoryRegion *dma_mr;
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MemoryRegion *dma_mr;
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AddressSpace *dma_as;
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AddressSpace dma_as;
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qemu_irq irq_zdma_ch_imr;
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qemu_irq irq_zdma_ch_imr;
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struct {
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struct {
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