tcg/i386: Implement vector TST{EQ,NE} for avx512
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -462,6 +462,14 @@ static bool tcg_target_const_match(int64_t val, int ct,
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#define OPC_VPSRLVD (0x45 | P_EXT38 | P_DATA16)
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#define OPC_VPSRLVQ (0x45 | P_EXT38 | P_DATA16 | P_VEXW)
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#define OPC_VPTERNLOGQ (0x25 | P_EXT3A | P_DATA16 | P_VEXW | P_EVEX)
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#define OPC_VPTESTMB (0x26 | P_EXT38 | P_DATA16 | P_EVEX)
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#define OPC_VPTESTMW (0x26 | P_EXT38 | P_DATA16 | P_VEXW | P_EVEX)
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#define OPC_VPTESTMD (0x27 | P_EXT38 | P_DATA16 | P_EVEX)
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#define OPC_VPTESTMQ (0x27 | P_EXT38 | P_DATA16 | P_VEXW | P_EVEX)
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#define OPC_VPTESTNMB (0x26 | P_EXT38 | P_SIMDF3 | P_EVEX)
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#define OPC_VPTESTNMW (0x26 | P_EXT38 | P_SIMDF3 | P_VEXW | P_EVEX)
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#define OPC_VPTESTNMD (0x27 | P_EXT38 | P_SIMDF3 | P_EVEX)
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#define OPC_VPTESTNMQ (0x27 | P_EXT38 | P_SIMDF3 | P_VEXW | P_EVEX)
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#define OPC_VZEROUPPER (0x77 | P_EXT)
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#define OPC_XCHG_ax_r32 (0x90)
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#define OPC_XCHG_EvGv (0x87)
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@ -3145,6 +3153,13 @@ static void tcg_out_cmp_vec_k1(TCGContext *s, TCGType type, unsigned vece,
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{ OPC_VPCMPB, OPC_VPCMPW, OPC_VPCMPD, OPC_VPCMPQ },
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{ OPC_VPCMPUB, OPC_VPCMPUW, OPC_VPCMPUD, OPC_VPCMPUQ }
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};
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static const int testm_insn[4] = {
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OPC_VPTESTMB, OPC_VPTESTMW, OPC_VPTESTMD, OPC_VPTESTMQ
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};
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static const int testnm_insn[4] = {
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OPC_VPTESTNMB, OPC_VPTESTNMW, OPC_VPTESTNMD, OPC_VPTESTNMQ
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};
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static const int cond_ext[16] = {
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[TCG_COND_EQ] = 0,
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[TCG_COND_NE] = 4,
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@ -3160,9 +3175,19 @@ static void tcg_out_cmp_vec_k1(TCGContext *s, TCGType type, unsigned vece,
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[TCG_COND_ALWAYS] = 7,
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};
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switch (cond) {
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case TCG_COND_TSTNE:
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tcg_out_vex_modrm_type(s, testm_insn[vece], /* k1 */ 1, v1, v2, type);
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break;
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case TCG_COND_TSTEQ:
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tcg_out_vex_modrm_type(s, testnm_insn[vece], /* k1 */ 1, v1, v2, type);
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break;
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default:
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tcg_out_vex_modrm_type(s, cmpm_insn[is_unsigned_cond(cond)][vece],
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/* k1 */ 1, v1, v2, type);
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tcg_out8(s, cond_ext[cond]);
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break;
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}
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}
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static void tcg_out_k1_to_vec(TCGContext *s, TCGType type,
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@ -224,7 +224,7 @@ typedef enum {
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#define TCG_TARGET_HAS_minmax_vec 1
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#define TCG_TARGET_HAS_bitsel_vec have_avx512vl
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#define TCG_TARGET_HAS_cmpsel_vec 1
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#define TCG_TARGET_HAS_tst_vec 0
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#define TCG_TARGET_HAS_tst_vec have_avx512bw
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#define TCG_TARGET_deposit_i32_valid(ofs, len) \
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(((ofs) == 0 && ((len) == 8 || (len) == 16)) || \
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