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Trivial branch pull request 20200610

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Convert DPRINTF() to traces or qemu_logs
 Use IEC binary prefix definitions
 Use qemu_semihosting_log_out() in target/unicore32
 Some code and doc cleanup
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Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-5.1-pull-request' into staging

Trivial branch pull request 20200610

Convert DPRINTF() to traces or qemu_logs
Use IEC binary prefix definitions
Use qemu_semihosting_log_out() in target/unicore32
Some code and doc cleanup

# gpg: Signature made Wed 10 Jun 2020 14:08:36 BST
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/trivial-branch-for-5.1-pull-request:
  semihosting: remove the pthread include which seems unused
  hw/openrisc/openrisc_sim: Add assertion to silence GCC warning
  target/unicore32: Prefer qemu_semihosting_log_out() over curses
  target/unicore32: Replace DPRINTF() by qemu_log_mask(GUEST_ERROR)
  target/unicore32: Remove unused headers
  target/i386/cpu: Use the IEC binary prefix definitions
  hw/i386/xen/xen-hvm: Use the IEC binary prefix definitions
  hw/hppa/dino: Use the IEC binary prefix definitions
  hw/arm/aspeed: Correct DRAM container region size
  qemu-img: Fix doc typo for 'bitmap' subcommand
  hw/misc/auxbus: Use qemu_log_mask(UNIMP) instead of debug printf
  hw/isa/apm: Convert debug printf()s to trace events
  hw/unicore32/puv3: Use qemu_log_mask(ERROR) instead of debug printf()
  .mailmap: Update Fred Konrad email address
  net: Do not include a newline in the id of -nic devices
  Fix parameter type in vhost migration log path

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

# Conflicts:
#	.mailmap
This commit is contained in:
Peter Maydell 2020-06-11 19:22:52 +01:00
commit 77c9e078b4
20 changed files with 73 additions and 92 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
.mailmap
View File

@ -46,6 +46,7 @@ Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> <arikalo@wavecomp.com>
Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> <aleksandar.rikalo@rt-rk.com>
Anthony Liguori <anthony@codemonkey.ws> Anthony Liguori <aliguori@us.ibm.com>
Filip Bozuta <filip.bozuta@syrmia.com> <filip.bozuta@rt-rk.com.com>
Frederic Konrad <konrad@adacore.com> <fred.konrad@greensocs.com>
James Hogan <jhogan@kernel.org> <james.hogan@imgtec.com>
Leif Lindholm <leif@nuviainc.com> <leif.lindholm@linaro.org>
Paul Burton <pburton@wavecomp.com> <paul.burton@mips.com>

1
default-configs/unicore32-softmmu.mak
View File

@ -3,3 +3,4 @@
# Boards:
#
CONFIG_PUV3=y
CONFIG_SEMIHOSTING=y

2
hw/arm/aspeed.c
View File

@ -262,7 +262,7 @@ static void aspeed_machine_init(MachineState *machine)
bmc = g_new0(AspeedBoardState, 1);
memory_region_init(&bmc->ram_container, NULL, "aspeed-ram-container",
UINT32_MAX);
4 * GiB);
memory_region_add_subregion(&bmc->ram_container, 0, machine->ram);
object_initialize_child(OBJECT(machine), "soc", &bmc->soc,

9
hw/dma/puv3_dma.c
View File

@ -15,6 +15,7 @@
#undef DEBUG_PUV3
#include "hw/unicore32/puv3.h"
#include "qemu/module.h"
#include "qemu/log.h"
#define PUV3_DMA_CH_NR (6)
#define PUV3_DMA_CH_MASK (0xff)
@ -43,7 +44,9 @@ static uint64_t puv3_dma_read(void *opaque, hwaddr offset,
ret = s->reg_CFG[PUV3_DMA_CH(offset)];
break;
default:
DPRINTF("Bad offset 0x%x\n", offset);
qemu_log_mask(LOG_GUEST_ERROR,
"%s: Bad read offset 0x%"HWADDR_PRIx"\n",
__func__, offset);
}
DPRINTF("offset 0x%x, value 0x%x\n", offset, ret);
@ -62,7 +65,9 @@ static void puv3_dma_write(void *opaque, hwaddr offset,
s->reg_CFG[PUV3_DMA_CH(offset)] = value;
break;
default:
DPRINTF("Bad offset 0x%x\n", offset);
qemu_log_mask(LOG_GUEST_ERROR,
"%s: Bad write offset 0x%"HWADDR_PRIx"\n",
__func__, offset);
}
DPRINTF("offset 0x%x, value 0x%x\n", offset, value);
}

15
hw/gpio/puv3_gpio.c
View File

@ -15,6 +15,7 @@
#undef DEBUG_PUV3
#include "hw/unicore32/puv3.h"
#include "qemu/module.h"
#include "qemu/log.h"
#define TYPE_PUV3_GPIO "puv3_gpio"
#define PUV3_GPIO(obj) OBJECT_CHECK(PUV3GPIOState, (obj), TYPE_PUV3_GPIO)
@ -47,7 +48,9 @@ static uint64_t puv3_gpio_read(void *opaque, hwaddr offset,
ret = s->reg_GPIR;
break;
default:
DPRINTF("Bad offset 0x%x\n", offset);
qemu_log_mask(LOG_GUEST_ERROR,
"%s: Bad read offset 0x%"HWADDR_PRIx"\n",
__func__, offset);
}
DPRINTF("offset 0x%x, value 0x%x\n", offset, ret);
@ -68,14 +71,16 @@ static void puv3_gpio_write(void *opaque, hwaddr offset,
if (s->reg_GPDR & value) {
s->reg_GPLR |= value;
} else {
DPRINTF("Write gpio input port error!");
qemu_log_mask(LOG_GUEST_ERROR, "%s: Write gpio input port\n",
__func__);
}
break;
case 0x0c:
if (s->reg_GPDR & value) {
s->reg_GPLR &= ~value;
} else {
DPRINTF("Write gpio input port error!");
qemu_log_mask(LOG_GUEST_ERROR, "%s: Write gpio input port\n",
__func__);
}
break;
case 0x10: /* GRER */
@ -86,7 +91,9 @@ static void puv3_gpio_write(void *opaque, hwaddr offset,
s->reg_GPIR = value;
break;
default:
DPRINTF("Bad offset 0x%x\n", offset);
qemu_log_mask(LOG_GUEST_ERROR,
"%s: Bad write offset 0x%"HWADDR_PRIx"\n",
__func__, offset);
}
}

4
hw/hppa/dino.c
View File

@ -542,7 +542,7 @@ PCIBus *dino_init(MemoryRegion *addr_space,
&s->parent_obj.data_mem);
/* Dino PCI bus memory. */
memory_region_init(&s->pci_mem, OBJECT(s), "pci-memory", 1ull << 32);
memory_region_init(&s->pci_mem, OBJECT(s), "pci-memory", 4 * GiB);
b = pci_register_root_bus(dev, "pci", dino_set_irq, dino_pci_map_irq, s,
&s->pci_mem, get_system_io(),
@ -561,7 +561,7 @@ PCIBus *dino_init(MemoryRegion *addr_space,
}
/* Set up PCI view of memory: Bus master address space. */
memory_region_init(&s->bm, OBJECT(s), "bm-dino", 1ull << 32);
memory_region_init(&s->bm, OBJECT(s), "bm-dino", 4 * GiB);
memory_region_init_alias(&s->bm_ram_alias, OBJECT(s),
"bm-system", addr_space, 0,
0xf0000000 + DINO_MEM_CHUNK_SIZE);

3
hw/i386/xen/xen-hvm.c
View File

@ -9,6 +9,7 @@
*/
#include "qemu/osdep.h"
#include "qemu/units.h"
#include "cpu.h"
#include "hw/pci/pci.h"
@ -230,7 +231,7 @@ static void xen_ram_init(PCMachineState *pcms,
* Xen does not allocate the memory continuously, it keeps a
* hole of the size computed above or passed in.
*/
block_len = (1ULL << 32) + x86ms->above_4g_mem_size;
block_len = (4 * GiB) + x86ms->above_4g_mem_size;
}
memory_region_init_ram(&ram_memory, NULL, "xen.ram", block_len,
&error_fatal);

9
hw/intc/puv3_intc.c
View File

@ -16,6 +16,7 @@
#undef DEBUG_PUV3
#include "hw/unicore32/puv3.h"
#include "qemu/module.h"
#include "qemu/log.h"
#define TYPE_PUV3_INTC "puv3_intc"
#define PUV3_INTC(obj) OBJECT_CHECK(PUV3INTCState, (obj), TYPE_PUV3_INTC)
@ -68,7 +69,9 @@ static uint64_t puv3_intc_read(void *opaque, hwaddr offset,
ret = s->reg_ICPR; /* the same value with ICPR */
break;
default:
DPRINTF("Bad offset %x\n", (int)offset);
qemu_log_mask(LOG_GUEST_ERROR,
"%s: Bad read offset 0x%"HWADDR_PRIx"\n",
__func__, offset);
}
DPRINTF("offset 0x%x, value 0x%x\n", offset, ret);
return ret;
@ -88,7 +91,9 @@ static void puv3_intc_write(void *opaque, hwaddr offset,
s->reg_ICMR = value;
break;
default:
DPRINTF("Bad offset 0x%x\n", (int)offset);
qemu_log_mask(LOG_GUEST_ERROR,
"%s: Bad write offset 0x%"HWADDR_PRIx"\n",
__func__, offset);
return;
}
puv3_intc_update(s);

15
hw/isa/apm.c
View File

@ -24,14 +24,8 @@
#include "hw/isa/apm.h"
#include "hw/pci/pci.h"
#include "migration/vmstate.h"
#include "trace.h"
//#define DEBUG
#ifdef DEBUG
# define APM_DPRINTF(format, ...) printf(format, ## __VA_ARGS__)
#else
# define APM_DPRINTF(format, ...) do { } while (0)
#endif
/* fixed I/O location */
#define APM_STS_IOPORT 0xb3
@ -41,8 +35,8 @@ static void apm_ioport_writeb(void *opaque, hwaddr addr, uint64_t val,
{
APMState *apm = opaque;
addr &= 1;
APM_DPRINTF("apm_ioport_writeb addr=0x%" HWADDR_PRIx
" val=0x%02" PRIx64 "\n", addr, val);
trace_apm_io_write(addr, val);
if (addr == 0) {
apm->apmc = val;
@ -65,7 +59,8 @@ static uint64_t apm_ioport_readb(void *opaque, hwaddr addr, unsigned size)
} else {
val = apm->apms;
}
APM_DPRINTF("apm_ioport_readb addr=0x%" HWADDR_PRIx " val=0x%02x\n", addr, val);
trace_apm_io_read(addr, val);
return val;
}

4
hw/isa/trace-events
View File

@ -9,3 +9,7 @@ superio_create_ide(int id, uint16_t base, unsigned int irq) "id=%d, base 0x%03x,
# pc87312.c
pc87312_io_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x"
pc87312_io_write(uint32_t addr, uint32_t val) "write addr=0x%x val=0x%x"
# apm.c
apm_io_read(uint8_t addr, uint8_t val) "read addr=0x%x val=0x%02x"
apm_io_write(uint8_t addr, uint8_t val) "write addr=0x%x val=0x%02x"

2
hw/misc/auxbus.c
View File

@ -196,7 +196,7 @@ AUXReply aux_request(AUXBus *bus, AUXCommand cmd, uint32_t address,
}
break;
default:
DPRINTF("Not implemented!\n");
qemu_log_mask(LOG_UNIMP, "AUX cmd=%u not implemented\n", cmd);
return AUX_NACK;
}

9
hw/misc/puv3_pm.c
View File

@ -15,6 +15,7 @@
#undef DEBUG_PUV3
#include "hw/unicore32/puv3.h"
#include "qemu/module.h"
#include "qemu/log.h"
#define TYPE_PUV3_PM "puv3_pm"
#define PUV3_PM(obj) OBJECT_CHECK(PUV3PMState, (obj), TYPE_PUV3_PM)
@ -73,7 +74,9 @@ static uint64_t puv3_pm_read(void *opaque, hwaddr offset,
ret = 0x7;
break;
default:
DPRINTF("Bad offset 0x%x\n", offset);
qemu_log_mask(LOG_GUEST_ERROR,
"%s: Bad read offset 0x%"HWADDR_PRIx"\n",
__func__, offset);
}
DPRINTF("offset 0x%x, value 0x%x\n", offset, ret);
@ -105,7 +108,9 @@ static void puv3_pm_write(void *opaque, hwaddr offset,
case 0x38:
break;
default:
DPRINTF("Bad offset 0x%x\n", offset);
qemu_log_mask(LOG_GUEST_ERROR,
"%s: Bad write offset 0x%"HWADDR_PRIx"\n",
__func__, offset);
}
DPRINTF("offset 0x%x, value 0x%x\n", offset, value);
}

1
hw/openrisc/openrisc_sim.c
View File

@ -134,6 +134,7 @@ static void openrisc_sim_init(MachineState *machine)
int n;
unsigned int smp_cpus = machine->smp.cpus;
assert(smp_cpus >= 1 && smp_cpus <= 2);
for (n = 0; n < smp_cpus; n++) {
cpu = OPENRISC_CPU(cpu_create(machine->cpu_type));
if (cpu == NULL) {

1
hw/semihosting/console.c
View File

@ -23,7 +23,6 @@
#include "exec/exec-all.h"
#include "qemu/log.h"
#include "chardev/char.h"
#include <pthread.h>
#include "chardev/char-fe.h"
#include "sysemu/sysemu.h"
#include "qemu/main-loop.h"

9
hw/timer/puv3_ost.c
View File

@ -14,6 +14,7 @@
#include "hw/irq.h"
#include "hw/ptimer.h"
#include "qemu/module.h"
#include "qemu/log.h"
#undef DEBUG_PUV3
#include "hw/unicore32/puv3.h"
@ -52,7 +53,9 @@ static uint64_t puv3_ost_read(void *opaque, hwaddr offset,
ret = s->reg_OIER;
break;
default:
DPRINTF("Bad offset %x\n", (int)offset);
qemu_log_mask(LOG_GUEST_ERROR,
"%s: Bad read offset 0x%"HWADDR_PRIx"\n",
__func__, offset);
}
DPRINTF("offset 0x%x, value 0x%x\n", offset, ret);
return ret;
@ -88,7 +91,9 @@ static void puv3_ost_write(void *opaque, hwaddr offset,
s->reg_OIER = value;
break;
default:
DPRINTF("Bad offset %x\n", (int)offset);
qemu_log_mask(LOG_GUEST_ERROR,
"%s: Bad write offset 0x%"HWADDR_PRIx"\n",
__func__, offset);
}
}

2
hw/unicore32/puv3.c
View File

@ -16,8 +16,6 @@
#include "hw/boards.h"
#include "hw/loader.h"
#include "sysemu/qtest.h"
#undef DEBUG_PUV3
#include "hw/unicore32/puv3.h"
#include "hw/input/i8042.h"
#include "hw/irq.h"

4
hw/virtio/vhost.c
View File

@ -834,12 +834,12 @@ err_features:
return r;
}
static int vhost_migration_log(MemoryListener *listener, int enable)
static int vhost_migration_log(MemoryListener *listener, bool enable)
{
struct vhost_dev *dev = container_of(listener, struct vhost_dev,
memory_listener);
int r;
if (!!enable == dev->log_enabled) {
if (enable == dev->log_enabled) {
return 0;
}
if (!dev->started) {

2
net/net.c
View File

@ -1506,7 +1506,7 @@ static int net_param_nic(void *dummy, QemuOpts *opts, Error **errp)
/* Create an ID if the user did not specify one */
nd_id = g_strdup(qemu_opts_id(opts));
if (!nd_id) {
nd_id = g_strdup_printf("__org.qemu.nic%i\n", idx);
nd_id = g_strdup_printf("__org.qemu.nic%i", idx);
qemu_opts_set_id(opts, nd_id);
}

2
target/i386/cpu.c
View File

@ -6159,7 +6159,7 @@ static void x86_cpu_machine_done(Notifier *n, void *unused)
if (smram) {
cpu->smram = g_new(MemoryRegion, 1);
memory_region_init_alias(cpu->smram, OBJECT(cpu), "smram",
smram, 0, 1ull << 32);
smram, 0, 4 * GiB);
memory_region_set_enabled(cpu->smram, true);
memory_region_add_subregion_overlap(cpu->cpu_as_root, 0, cpu->smram, 1);
}

66
target/unicore32/helper.c
View File

@ -10,14 +10,11 @@
*/
#include "qemu/osdep.h"
#include "qemu/log.h"
#include "cpu.h"
#include "exec/exec-all.h"
#include "exec/gdbstub.h"
#include "exec/helper-proto.h"
#include "qemu/host-utils.h"
#ifndef CONFIG_USER_ONLY
#include "ui/console.h"
#endif
#include "hw/semihosting/console.h"
#undef DEBUG_UC32
@ -108,7 +105,8 @@ void helper_cp0_set(CPUUniCore32State *env, uint32_t val, uint32_t creg,
}
return;
unrecognized:
DPRINTF("Wrong register (%d) or wrong operation (%d) in cp0_set!\n",
qemu_log_mask(LOG_GUEST_ERROR,
"Wrong register (%d) or wrong operation (%d) in cp0_set!\n",
creg, cop);
}
@ -155,63 +153,19 @@ uint32_t helper_cp0_get(CPUUniCore32State *env, uint32_t creg, uint32_t cop)
}
break;
}
DPRINTF("Wrong register (%d) or wrong operation (%d) in cp0_set!\n",
qemu_log_mask(LOG_GUEST_ERROR,
"Wrong register (%d) or wrong operation (%d) in cp0_set!\n",
creg, cop);
return 0;
}
#ifdef CONFIG_CURSES
/* KEY_EVENT is defined in wincon.h and in curses.h. Avoid redefinition. */
#undef KEY_EVENT
#include <curses.h>
#undef KEY_EVENT
/*
* FIXME:
* 1. curses windows will be blank when switching back
* 2. backspace is not handled yet
*/
static void putc_on_screen(unsigned char ch)
void helper_cp1_putc(target_ulong regval)
{
static WINDOW *localwin;
static int init;
const char c = regval;
if (!init) {
/* Assume 80 * 30 screen to minimize the implementation */
localwin = newwin(30, 80, 0, 0);
scrollok(localwin, TRUE);
init = TRUE;
}
if (isprint(ch)) {
wprintw(localwin, "%c", ch);
} else {
switch (ch) {
case '\n':
wprintw(localwin, "%c", ch);
break;
case '\r':
/* If '\r' is put before '\n', the curses window will destroy the
* last print line. And meanwhile, '\n' implifies '\r' inside. */
break;
default: /* Not handled, so just print it hex code */
wprintw(localwin, "-- 0x%x --", ch);
}
}
wrefresh(localwin);
qemu_semihosting_log_out(&c, sizeof(c));
}
#else
#define putc_on_screen(c) do { } while (0)
#endif
void helper_cp1_putc(target_ulong x)
{
putc_on_screen((unsigned char)x); /* Output to screen */
DPRINTF("%c", x); /* Output to stdout */
}
#endif
#endif /* !CONFIG_USER_ONLY */
bool uc32_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{