megasas: Decode register names
To ease debugging we should be decoding the register names. Signed-off-by: Hannes Reinecke <hare@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -1990,6 +1990,7 @@ static uint64_t megasas_mmio_read(void *opaque, hwaddr addr,
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switch (addr) {
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case MFI_IDB:
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retval = 0;
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trace_megasas_mmio_readl("MFI_IDB", retval);
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break;
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case MFI_OMSG0:
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case MFI_OSP0:
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@ -1997,29 +1998,35 @@ static uint64_t megasas_mmio_read(void *opaque, hwaddr addr,
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(s->fw_state & MFI_FWSTATE_MASK) |
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((s->fw_sge & 0xff) << 16) |
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(s->fw_cmds & 0xFFFF);
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trace_megasas_mmio_readl(addr == MFI_OMSG0 ? "MFI_OMSG0" : "MFI_OSP0",
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retval);
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break;
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case MFI_OSTS:
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if (megasas_intr_enabled(s) && s->doorbell) {
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retval = base_class->osts;
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}
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trace_megasas_mmio_readl("MFI_OSTS", retval);
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break;
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case MFI_OMSK:
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retval = s->intr_mask;
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trace_megasas_mmio_readl("MFI_OMSK", retval);
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break;
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case MFI_ODCR0:
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retval = s->doorbell;
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trace_megasas_mmio_readl("MFI_ODCR0", retval);
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break;
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case MFI_DIAG:
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retval = s->diag;
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trace_megasas_mmio_readl("MFI_DIAG", retval);
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break;
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case MFI_OSP1:
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retval = 15;
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trace_megasas_mmio_readl("MFI_OSP1", retval);
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break;
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default:
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trace_megasas_mmio_invalid_readl(addr);
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break;
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}
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trace_megasas_mmio_readl(addr, retval);
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return retval;
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}
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@ -2034,9 +2041,9 @@ static void megasas_mmio_write(void *opaque, hwaddr addr,
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uint32_t frame_count;
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int i;
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trace_megasas_mmio_writel(addr, val);
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switch (addr) {
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case MFI_IDB:
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trace_megasas_mmio_writel("MFI_IDB", val);
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if (val & MFI_FWINIT_ABORT) {
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/* Abort all pending cmds */
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for (i = 0; i < s->fw_cmds; i++) {
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@ -2056,6 +2063,7 @@ static void megasas_mmio_write(void *opaque, hwaddr addr,
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}
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break;
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case MFI_OMSK:
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trace_megasas_mmio_writel("MFI_OMSK", val);
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s->intr_mask = val;
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if (!megasas_intr_enabled(s) &&
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!msi_enabled(pci_dev) &&
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@ -2077,6 +2085,7 @@ static void megasas_mmio_write(void *opaque, hwaddr addr,
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}
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break;
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case MFI_ODCR0:
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trace_megasas_mmio_writel("MFI_ODCR0", val);
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s->doorbell = 0;
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if (s->producer_pa && megasas_intr_enabled(s)) {
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/* Update reply queue pointer */
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@ -2090,14 +2099,20 @@ static void megasas_mmio_write(void *opaque, hwaddr addr,
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}
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break;
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case MFI_IQPH:
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trace_megasas_mmio_writel("MFI_IQPH", val);
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/* Received high 32 bits of a 64 bit MFI frame address */
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s->frame_hi = val;
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break;
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case MFI_IQPL:
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trace_megasas_mmio_writel("MFI_IQPL", val);
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/* Received low 32 bits of a 64 bit MFI frame address */
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/* Fallthrough */
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case MFI_IQP:
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/* Received 64 bit MFI frame address */
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if (addr == MFI_IQP) {
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trace_megasas_mmio_writel("MFI_IQP", val);
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/* Received 64 bit MFI frame address */
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s->frame_hi = 0;
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}
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frame_addr = (val & ~0x1F);
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/* Add possible 64 bit offset */
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frame_addr |= ((uint64_t)s->frame_hi << 32);
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@ -2106,6 +2121,7 @@ static void megasas_mmio_write(void *opaque, hwaddr addr,
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megasas_handle_frame(s, frame_addr, frame_count);
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break;
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case MFI_SEQ:
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trace_megasas_mmio_writel("MFI_SEQ", val);
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/* Magic sequence to start ADP reset */
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if (adp_reset_seq[s->adp_reset] == val) {
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s->adp_reset++;
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@ -2118,6 +2134,7 @@ static void megasas_mmio_write(void *opaque, hwaddr addr,
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}
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break;
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case MFI_DIAG:
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trace_megasas_mmio_writel("MFI_DIAG", val);
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/* ADP reset */
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if ((s->diag & MFI_DIAG_WRITE_ENABLE) &&
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(val & MFI_DIAG_RESET_ADP)) {
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@ -764,9 +764,9 @@ megasas_intr_enabled(void) "Interrupts enabled"
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megasas_intr_disabled(void) "Interrupts disabled"
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megasas_msix_enabled(int vector) "vector %d"
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megasas_msi_enabled(int vector) "vector %d"
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megasas_mmio_readl(unsigned long addr, uint32_t val) "addr 0x%lx: 0x%x"
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megasas_mmio_readl(const char *reg, uint32_t val) "reg %s: 0x%x"
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megasas_mmio_invalid_readl(unsigned long addr) "addr 0x%lx"
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megasas_mmio_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x"
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megasas_mmio_writel(const char *reg, uint32_t val) "reg %s: 0x%x"
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megasas_mmio_invalid_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x"
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# hw/audio/milkymist-ac97.c
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