target-sparc: Directly implement easy ldf/stf asis
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
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6850811e7c
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7705091ca4
@ -2282,10 +2282,33 @@ static void gen_ldf_asi(DisasContext *dc, TCGv addr,
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int insn, int size, int rd)
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{
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DisasASI da = get_asi(dc, insn, (size == 4 ? MO_TEUL : MO_TEQ));
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TCGv_i32 d32;
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switch (da.type) {
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case GET_ASI_EXCP:
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break;
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case GET_ASI_DIRECT:
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gen_address_mask(dc, addr);
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switch (size) {
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case 4:
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d32 = gen_dest_fpr_F(dc);
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tcg_gen_qemu_ld_i32(d32, addr, da.mem_idx, da.memop);
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gen_store_fpr_F(dc, rd, d32);
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break;
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case 8:
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tcg_gen_qemu_ld_i64(cpu_fpr[rd / 2], addr, da.mem_idx, da.memop);
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break;
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case 16:
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tcg_gen_qemu_ld_i64(cpu_fpr[rd / 2], addr, da.mem_idx, da.memop);
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tcg_gen_addi_tl(addr, addr, 8);
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tcg_gen_qemu_ld_i64(cpu_fpr[rd/2+1], addr, da.mem_idx, da.memop);
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break;
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default:
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g_assert_not_reached();
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}
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break;
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default:
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{
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TCGv_i32 r_asi = tcg_const_i32(da.asi);
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@ -2306,10 +2329,32 @@ static void gen_stf_asi(DisasContext *dc, TCGv addr,
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int insn, int size, int rd)
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{
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DisasASI da = get_asi(dc, insn, (size == 4 ? MO_TEUL : MO_TEQ));
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TCGv_i32 d32;
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switch (da.type) {
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case GET_ASI_EXCP:
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break;
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case GET_ASI_DIRECT:
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gen_address_mask(dc, addr);
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switch (size) {
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case 4:
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d32 = gen_load_fpr_F(dc, rd);
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tcg_gen_qemu_st_i32(d32, addr, da.mem_idx, da.memop);
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break;
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case 8:
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tcg_gen_qemu_st_i64(cpu_fpr[rd / 2], addr, da.mem_idx, da.memop);
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break;
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case 16:
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tcg_gen_qemu_st_i64(cpu_fpr[rd / 2], addr, da.mem_idx, da.memop);
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tcg_gen_addi_tl(addr, addr, 8);
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tcg_gen_qemu_st_i64(cpu_fpr[rd/2+1], addr, da.mem_idx, da.memop);
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break;
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default:
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g_assert_not_reached();
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}
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break;
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default:
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{
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TCGv_i32 r_asi = tcg_const_i32(da.asi);
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