Fix for -rc2
* Fix build failure on mips host -----BEGIN PGP SIGNATURE----- iQIcBAABCAAGBQJbVjAvAAoJECgHk2+YTcWmJAcP/02GNO/kx4IKR1IAzEW6YfF4 6jbdlFv6bDZzIkYei/4xjOmDPKaGhJrstXb1x38stFWFME5l8IQKUGpurMcyk2+k BYSMgkafJNicrk63K7NNwsplJ+/jUdmpKSiEnyd6V70Tmc4uVzqyUkV11woyECKj G90K3oXCh1BSifTTl+j/0VeZ1x3CU5jpi7eEV8MZ6JKVY7GCBYCjhb2tAmZgQctJ gWRar6z4xGZ2KzCegCEqSQ2PPZqHWO9z/ILVX0+CRR/r46vZTbfmKc0r3JLU1g4A aVlQeg8gulcHitSiBsgnhe08TaOOuOT/bdrYTLZjfUHkNdhIPSEZ1DPmz0yPYwAK IBmznUrs0MfAVigRorcEzJXKW4fyUrurO+OrmuMJ2WQqCOrq1XtplozX3rIY2sGk hD/MN7MQurRUiG7efaiYeD5dwQZVOCjMlM7Z9mWJNhPDrOix6ZFIk19Q6fOGa8Ng kHCNJiPaOLaA4PvOFJNsvT7Fp3btC72s82m+zeRJXHGoTXEJGGkDoMieuodmvDHK o5ejz3dChdm3abUBndJqVFX5l934D/DGDS4gMb47wqC+xFR6JGQ3uOLUjkZWJkhU YJTQKRqMd/EKqoGbZeBryiNqCGm9QmhCWN90qgumoRw82MspIvAtsP+K6OJa0ONq by7Nh21+Kdv+43zqG9L7 =3ckJ -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' into staging Fix for -rc2 * Fix build failure on mips host # gpg: Signature made Mon 23 Jul 2018 20:44:47 BST # gpg: using RSA key 2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-next-pull-request: i386: Rename enum CacheType members Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
commit
768cef2974
@ -71,123 +71,123 @@ struct CPUID2CacheDescriptorInfo {
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* From Intel SDM Volume 2A, CPUID instruction
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*/
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struct CPUID2CacheDescriptorInfo cpuid2_cache_descriptors[] = {
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[0x06] = { .level = 1, .type = ICACHE, .size = 8 * KiB,
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[0x06] = { .level = 1, .type = INSTRUCTION_CACHE, .size = 8 * KiB,
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.associativity = 4, .line_size = 32, },
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[0x08] = { .level = 1, .type = ICACHE, .size = 16 * KiB,
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[0x08] = { .level = 1, .type = INSTRUCTION_CACHE, .size = 16 * KiB,
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.associativity = 4, .line_size = 32, },
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[0x09] = { .level = 1, .type = ICACHE, .size = 32 * KiB,
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[0x09] = { .level = 1, .type = INSTRUCTION_CACHE, .size = 32 * KiB,
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.associativity = 4, .line_size = 64, },
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[0x0A] = { .level = 1, .type = DCACHE, .size = 8 * KiB,
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[0x0A] = { .level = 1, .type = DATA_CACHE, .size = 8 * KiB,
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.associativity = 2, .line_size = 32, },
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[0x0C] = { .level = 1, .type = DCACHE, .size = 16 * KiB,
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[0x0C] = { .level = 1, .type = DATA_CACHE, .size = 16 * KiB,
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.associativity = 4, .line_size = 32, },
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[0x0D] = { .level = 1, .type = DCACHE, .size = 16 * KiB,
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[0x0D] = { .level = 1, .type = DATA_CACHE, .size = 16 * KiB,
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.associativity = 4, .line_size = 64, },
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[0x0E] = { .level = 1, .type = DCACHE, .size = 24 * KiB,
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[0x0E] = { .level = 1, .type = DATA_CACHE, .size = 24 * KiB,
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.associativity = 6, .line_size = 64, },
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[0x1D] = { .level = 2, .type = UNIFIED_CACHE, .size = 128 * KiB,
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[0x1D] = { .level = 2, .type = UNIFIED_CACHE, .size = 128 * KiB,
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.associativity = 2, .line_size = 64, },
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[0x21] = { .level = 2, .type = UNIFIED_CACHE, .size = 256 * KiB,
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[0x21] = { .level = 2, .type = UNIFIED_CACHE, .size = 256 * KiB,
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.associativity = 8, .line_size = 64, },
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/* lines per sector is not supported cpuid2_cache_descriptor(),
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* so descriptors 0x22, 0x23 are not included
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*/
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[0x24] = { .level = 2, .type = UNIFIED_CACHE, .size = 1 * MiB,
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[0x24] = { .level = 2, .type = UNIFIED_CACHE, .size = 1 * MiB,
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.associativity = 16, .line_size = 64, },
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/* lines per sector is not supported cpuid2_cache_descriptor(),
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* so descriptors 0x25, 0x20 are not included
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*/
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[0x2C] = { .level = 1, .type = DCACHE, .size = 32 * KiB,
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[0x2C] = { .level = 1, .type = DATA_CACHE, .size = 32 * KiB,
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.associativity = 8, .line_size = 64, },
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[0x30] = { .level = 1, .type = ICACHE, .size = 32 * KiB,
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[0x30] = { .level = 1, .type = INSTRUCTION_CACHE, .size = 32 * KiB,
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.associativity = 8, .line_size = 64, },
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[0x41] = { .level = 2, .type = UNIFIED_CACHE, .size = 128 * KiB,
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[0x41] = { .level = 2, .type = UNIFIED_CACHE, .size = 128 * KiB,
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.associativity = 4, .line_size = 32, },
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[0x42] = { .level = 2, .type = UNIFIED_CACHE, .size = 256 * KiB,
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[0x42] = { .level = 2, .type = UNIFIED_CACHE, .size = 256 * KiB,
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.associativity = 4, .line_size = 32, },
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[0x43] = { .level = 2, .type = UNIFIED_CACHE, .size = 512 * KiB,
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[0x43] = { .level = 2, .type = UNIFIED_CACHE, .size = 512 * KiB,
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.associativity = 4, .line_size = 32, },
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[0x44] = { .level = 2, .type = UNIFIED_CACHE, .size = 1 * MiB,
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[0x44] = { .level = 2, .type = UNIFIED_CACHE, .size = 1 * MiB,
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.associativity = 4, .line_size = 32, },
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[0x45] = { .level = 2, .type = UNIFIED_CACHE, .size = 2 * MiB,
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[0x45] = { .level = 2, .type = UNIFIED_CACHE, .size = 2 * MiB,
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.associativity = 4, .line_size = 32, },
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[0x46] = { .level = 3, .type = UNIFIED_CACHE, .size = 4 * MiB,
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[0x46] = { .level = 3, .type = UNIFIED_CACHE, .size = 4 * MiB,
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.associativity = 4, .line_size = 64, },
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[0x47] = { .level = 3, .type = UNIFIED_CACHE, .size = 8 * MiB,
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[0x47] = { .level = 3, .type = UNIFIED_CACHE, .size = 8 * MiB,
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.associativity = 8, .line_size = 64, },
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[0x48] = { .level = 2, .type = UNIFIED_CACHE, .size = 3 * MiB,
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[0x48] = { .level = 2, .type = UNIFIED_CACHE, .size = 3 * MiB,
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.associativity = 12, .line_size = 64, },
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/* Descriptor 0x49 depends on CPU family/model, so it is not included */
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[0x4A] = { .level = 3, .type = UNIFIED_CACHE, .size = 6 * MiB,
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[0x4A] = { .level = 3, .type = UNIFIED_CACHE, .size = 6 * MiB,
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.associativity = 12, .line_size = 64, },
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[0x4B] = { .level = 3, .type = UNIFIED_CACHE, .size = 8 * MiB,
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[0x4B] = { .level = 3, .type = UNIFIED_CACHE, .size = 8 * MiB,
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.associativity = 16, .line_size = 64, },
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[0x4C] = { .level = 3, .type = UNIFIED_CACHE, .size = 12 * MiB,
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[0x4C] = { .level = 3, .type = UNIFIED_CACHE, .size = 12 * MiB,
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.associativity = 12, .line_size = 64, },
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[0x4D] = { .level = 3, .type = UNIFIED_CACHE, .size = 16 * MiB,
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[0x4D] = { .level = 3, .type = UNIFIED_CACHE, .size = 16 * MiB,
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.associativity = 16, .line_size = 64, },
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[0x4E] = { .level = 2, .type = UNIFIED_CACHE, .size = 6 * MiB,
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[0x4E] = { .level = 2, .type = UNIFIED_CACHE, .size = 6 * MiB,
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.associativity = 24, .line_size = 64, },
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[0x60] = { .level = 1, .type = DCACHE, .size = 16 * KiB,
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[0x60] = { .level = 1, .type = DATA_CACHE, .size = 16 * KiB,
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.associativity = 8, .line_size = 64, },
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[0x66] = { .level = 1, .type = DCACHE, .size = 8 * KiB,
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[0x66] = { .level = 1, .type = DATA_CACHE, .size = 8 * KiB,
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.associativity = 4, .line_size = 64, },
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[0x67] = { .level = 1, .type = DCACHE, .size = 16 * KiB,
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[0x67] = { .level = 1, .type = DATA_CACHE, .size = 16 * KiB,
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.associativity = 4, .line_size = 64, },
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[0x68] = { .level = 1, .type = DCACHE, .size = 32 * KiB,
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[0x68] = { .level = 1, .type = DATA_CACHE, .size = 32 * KiB,
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.associativity = 4, .line_size = 64, },
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[0x78] = { .level = 2, .type = UNIFIED_CACHE, .size = 1 * MiB,
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[0x78] = { .level = 2, .type = UNIFIED_CACHE, .size = 1 * MiB,
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.associativity = 4, .line_size = 64, },
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/* lines per sector is not supported cpuid2_cache_descriptor(),
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* so descriptors 0x79, 0x7A, 0x7B, 0x7C are not included.
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*/
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[0x7D] = { .level = 2, .type = UNIFIED_CACHE, .size = 2 * MiB,
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[0x7D] = { .level = 2, .type = UNIFIED_CACHE, .size = 2 * MiB,
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.associativity = 8, .line_size = 64, },
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[0x7F] = { .level = 2, .type = UNIFIED_CACHE, .size = 512 * KiB,
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[0x7F] = { .level = 2, .type = UNIFIED_CACHE, .size = 512 * KiB,
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.associativity = 2, .line_size = 64, },
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[0x80] = { .level = 2, .type = UNIFIED_CACHE, .size = 512 * KiB,
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[0x80] = { .level = 2, .type = UNIFIED_CACHE, .size = 512 * KiB,
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.associativity = 8, .line_size = 64, },
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[0x82] = { .level = 2, .type = UNIFIED_CACHE, .size = 256 * KiB,
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[0x82] = { .level = 2, .type = UNIFIED_CACHE, .size = 256 * KiB,
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.associativity = 8, .line_size = 32, },
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[0x83] = { .level = 2, .type = UNIFIED_CACHE, .size = 512 * KiB,
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[0x83] = { .level = 2, .type = UNIFIED_CACHE, .size = 512 * KiB,
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.associativity = 8, .line_size = 32, },
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[0x84] = { .level = 2, .type = UNIFIED_CACHE, .size = 1 * MiB,
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[0x84] = { .level = 2, .type = UNIFIED_CACHE, .size = 1 * MiB,
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.associativity = 8, .line_size = 32, },
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[0x85] = { .level = 2, .type = UNIFIED_CACHE, .size = 2 * MiB,
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[0x85] = { .level = 2, .type = UNIFIED_CACHE, .size = 2 * MiB,
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.associativity = 8, .line_size = 32, },
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[0x86] = { .level = 2, .type = UNIFIED_CACHE, .size = 512 * KiB,
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[0x86] = { .level = 2, .type = UNIFIED_CACHE, .size = 512 * KiB,
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.associativity = 4, .line_size = 64, },
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[0x87] = { .level = 2, .type = UNIFIED_CACHE, .size = 1 * MiB,
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[0x87] = { .level = 2, .type = UNIFIED_CACHE, .size = 1 * MiB,
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.associativity = 8, .line_size = 64, },
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[0xD0] = { .level = 3, .type = UNIFIED_CACHE, .size = 512 * KiB,
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[0xD0] = { .level = 3, .type = UNIFIED_CACHE, .size = 512 * KiB,
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.associativity = 4, .line_size = 64, },
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[0xD1] = { .level = 3, .type = UNIFIED_CACHE, .size = 1 * MiB,
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[0xD1] = { .level = 3, .type = UNIFIED_CACHE, .size = 1 * MiB,
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.associativity = 4, .line_size = 64, },
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[0xD2] = { .level = 3, .type = UNIFIED_CACHE, .size = 2 * MiB,
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[0xD2] = { .level = 3, .type = UNIFIED_CACHE, .size = 2 * MiB,
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.associativity = 4, .line_size = 64, },
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[0xD6] = { .level = 3, .type = UNIFIED_CACHE, .size = 1 * MiB,
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[0xD6] = { .level = 3, .type = UNIFIED_CACHE, .size = 1 * MiB,
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.associativity = 8, .line_size = 64, },
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[0xD7] = { .level = 3, .type = UNIFIED_CACHE, .size = 2 * MiB,
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[0xD7] = { .level = 3, .type = UNIFIED_CACHE, .size = 2 * MiB,
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.associativity = 8, .line_size = 64, },
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[0xD8] = { .level = 3, .type = UNIFIED_CACHE, .size = 4 * MiB,
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[0xD8] = { .level = 3, .type = UNIFIED_CACHE, .size = 4 * MiB,
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.associativity = 8, .line_size = 64, },
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[0xDC] = { .level = 3, .type = UNIFIED_CACHE, .size = 1.5 * MiB,
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[0xDC] = { .level = 3, .type = UNIFIED_CACHE, .size = 1.5 * MiB,
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.associativity = 12, .line_size = 64, },
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[0xDD] = { .level = 3, .type = UNIFIED_CACHE, .size = 3 * MiB,
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[0xDD] = { .level = 3, .type = UNIFIED_CACHE, .size = 3 * MiB,
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.associativity = 12, .line_size = 64, },
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[0xDE] = { .level = 3, .type = UNIFIED_CACHE, .size = 6 * MiB,
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[0xDE] = { .level = 3, .type = UNIFIED_CACHE, .size = 6 * MiB,
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.associativity = 12, .line_size = 64, },
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[0xE2] = { .level = 3, .type = UNIFIED_CACHE, .size = 2 * MiB,
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[0xE2] = { .level = 3, .type = UNIFIED_CACHE, .size = 2 * MiB,
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.associativity = 16, .line_size = 64, },
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[0xE3] = { .level = 3, .type = UNIFIED_CACHE, .size = 4 * MiB,
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[0xE3] = { .level = 3, .type = UNIFIED_CACHE, .size = 4 * MiB,
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.associativity = 16, .line_size = 64, },
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[0xE4] = { .level = 3, .type = UNIFIED_CACHE, .size = 8 * MiB,
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[0xE4] = { .level = 3, .type = UNIFIED_CACHE, .size = 8 * MiB,
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.associativity = 16, .line_size = 64, },
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[0xEA] = { .level = 3, .type = UNIFIED_CACHE, .size = 12 * MiB,
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[0xEA] = { .level = 3, .type = UNIFIED_CACHE, .size = 12 * MiB,
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.associativity = 24, .line_size = 64, },
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[0xEB] = { .level = 3, .type = UNIFIED_CACHE, .size = 18 * MiB,
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[0xEB] = { .level = 3, .type = UNIFIED_CACHE, .size = 18 * MiB,
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.associativity = 24, .line_size = 64, },
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[0xEC] = { .level = 3, .type = UNIFIED_CACHE, .size = 24 * MiB,
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[0xEC] = { .level = 3, .type = UNIFIED_CACHE, .size = 24 * MiB,
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.associativity = 24, .line_size = 64, },
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};
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@ -238,10 +238,10 @@ static uint8_t cpuid2_cache_descriptor(CPUCacheInfo *cache)
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#define CACHE_COMPLEX_IDX (1 << 2)
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/* Encode CacheType for CPUID[4].EAX */
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#define CACHE_TYPE(t) (((t) == DCACHE) ? CACHE_TYPE_D : \
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((t) == ICACHE) ? CACHE_TYPE_I : \
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((t) == UNIFIED_CACHE) ? CACHE_TYPE_UNIFIED : \
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0 /* Invalid value */)
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#define CACHE_TYPE(t) (((t) == DATA_CACHE) ? CACHE_TYPE_D : \
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((t) == INSTRUCTION_CACHE) ? CACHE_TYPE_I : \
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((t) == UNIFIED_CACHE) ? CACHE_TYPE_UNIFIED : \
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0 /* Invalid value */)
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/* Encode cache info for CPUID[4] */
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@ -538,7 +538,7 @@ static void encode_topo_cpuid8000001e(CPUState *cs, X86CPU *cpu,
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/* L1 data cache: */
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static CPUCacheInfo legacy_l1d_cache = {
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.type = DCACHE,
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.type = DATA_CACHE,
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.level = 1,
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.size = 32 * KiB,
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.self_init = 1,
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@ -551,7 +551,7 @@ static CPUCacheInfo legacy_l1d_cache = {
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/*FIXME: CPUID leaf 0x80000005 is inconsistent with leaves 2 & 4 */
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static CPUCacheInfo legacy_l1d_cache_amd = {
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.type = DCACHE,
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.type = DATA_CACHE,
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.level = 1,
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.size = 64 * KiB,
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.self_init = 1,
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@ -565,7 +565,7 @@ static CPUCacheInfo legacy_l1d_cache_amd = {
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/* L1 instruction cache: */
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static CPUCacheInfo legacy_l1i_cache = {
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.type = ICACHE,
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.type = INSTRUCTION_CACHE,
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.level = 1,
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.size = 32 * KiB,
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.self_init = 1,
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@ -578,7 +578,7 @@ static CPUCacheInfo legacy_l1i_cache = {
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/*FIXME: CPUID leaf 0x80000005 is inconsistent with leaves 2 & 4 */
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static CPUCacheInfo legacy_l1i_cache_amd = {
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.type = ICACHE,
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.type = INSTRUCTION_CACHE,
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.level = 1,
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.size = 64 * KiB,
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.self_init = 1,
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@ -1310,7 +1310,7 @@ struct X86CPUDefinition {
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static CPUCaches epyc_cache_info = {
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.l1d_cache = &(CPUCacheInfo) {
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.type = DCACHE,
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.type = DATA_CACHE,
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.level = 1,
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.size = 32 * KiB,
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.line_size = 64,
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@ -1322,7 +1322,7 @@ static CPUCaches epyc_cache_info = {
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.no_invd_sharing = true,
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},
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.l1i_cache = &(CPUCacheInfo) {
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.type = ICACHE,
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.type = INSTRUCTION_CACHE,
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.level = 1,
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.size = 64 * KiB,
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.line_size = 64,
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@ -1050,8 +1050,8 @@ typedef enum TPRAccess {
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/* Cache information data structures: */
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enum CacheType {
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DCACHE,
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ICACHE,
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DATA_CACHE,
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INSTRUCTION_CACHE,
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UNIFIED_CACHE
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};
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