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ppc/pnv: Add an "nr-threads" property to the base chip class

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Set it at chip creation and forward it to the cores. This allows to drop
a call to qdev_get_machine().

Signed-off-by: Greg Kurz <groug@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20200106145645.4539-7-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Greg Kurz 2020-01-06 15:56:39 +01:00 committed by David Gibson
parent 53981dd505
commit 764f9b2559
2 changed files with 6 additions and 3 deletions
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8
hw/ppc/pnv.c
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@ -802,6 +802,8 @@ static void pnv_init(MachineState *machine)
&error_fatal); &error_fatal);
object_property_set_int(chip, machine->smp.cores, object_property_set_int(chip, machine->smp.cores,
"nr-cores", &error_fatal); "nr-cores", &error_fatal);
object_property_set_int(chip, machine->smp.threads,
"nr-threads", &error_fatal);
/* /*
* The POWER8 machine use the XICS interrupt interface. * The POWER8 machine use the XICS interrupt interface.
* Propagate the XICS fabric to the chip and its controllers. * Propagate the XICS fabric to the chip and its controllers.
@ -1526,7 +1528,6 @@ static void pnv_chip_core_sanitize(PnvChip *chip, Error **errp)
static void pnv_chip_core_realize(PnvChip *chip, Error **errp) static void pnv_chip_core_realize(PnvChip *chip, Error **errp)
{ {
MachineState *ms = MACHINE(qdev_get_machine());
Error *error = NULL; Error *error = NULL;
PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip); PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
const char *typename = pnv_chip_core_typename(chip); const char *typename = pnv_chip_core_typename(chip);
@ -1562,8 +1563,8 @@ static void pnv_chip_core_realize(PnvChip *chip, Error **errp)
object_property_add_child(OBJECT(chip), core_name, OBJECT(pnv_core), object_property_add_child(OBJECT(chip), core_name, OBJECT(pnv_core),
&error_abort); &error_abort);
chip->cores[i] = pnv_core; chip->cores[i] = pnv_core;
object_property_set_int(OBJECT(pnv_core), ms->smp.threads, "nr-threads", object_property_set_int(OBJECT(pnv_core), chip->nr_threads,
&error_fatal); "nr-threads", &error_fatal);
object_property_set_int(OBJECT(pnv_core), core_hwid, object_property_set_int(OBJECT(pnv_core), core_hwid,
CPU_CORE_PROP_CORE_ID, &error_fatal); CPU_CORE_PROP_CORE_ID, &error_fatal);
object_property_set_int(OBJECT(pnv_core), object_property_set_int(OBJECT(pnv_core),
@ -1602,6 +1603,7 @@ static Property pnv_chip_properties[] = {
DEFINE_PROP_UINT64("ram-size", PnvChip, ram_size, 0), DEFINE_PROP_UINT64("ram-size", PnvChip, ram_size, 0),
DEFINE_PROP_UINT32("nr-cores", PnvChip, nr_cores, 1), DEFINE_PROP_UINT32("nr-cores", PnvChip, nr_cores, 1),
DEFINE_PROP_UINT64("cores-mask", PnvChip, cores_mask, 0x0), DEFINE_PROP_UINT64("cores-mask", PnvChip, cores_mask, 0x0),
DEFINE_PROP_UINT32("nr-threads", PnvChip, nr_threads, 1),
DEFINE_PROP_END_OF_LIST(), DEFINE_PROP_END_OF_LIST(),
}; };

1
include/hw/ppc/pnv.h
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@ -48,6 +48,7 @@ typedef struct PnvChip {
uint64_t ram_size; uint64_t ram_size;
uint32_t nr_cores; uint32_t nr_cores;
uint32_t nr_threads;
uint64_t cores_mask; uint64_t cores_mask;
PnvCore **cores; PnvCore **cores;