hw/dma/omap_dma: Fix bugs with DMA requests above 32
The drqbmp field of struct soc_dma_s is a uint64_t; however several places in the code attempt to set bits in it using "(1 << drq)", which will fail if drq is large enough that the 1 bit gets shifted off the top of a 32 bit integer. Change these to "(1ULL << drq)" so that the promotion to 64 bit happens before the shift rather than afterwards. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1372423919-5669-1-git-send-email-peter.maydell@linaro.org
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@ -248,7 +248,7 @@ static void omap_dma_deactivate_channel(struct omap_dma_s *s,
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/* Don't deactive the channel if it is synchronized and the DMA request is
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active */
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if (ch->sync && ch->enable && (s->dma->drqbmp & (1 << ch->sync)))
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if (ch->sync && ch->enable && (s->dma->drqbmp & (1ULL << ch->sync)))
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return;
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if (ch->active) {
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@ -268,8 +268,9 @@ static void omap_dma_enable_channel(struct omap_dma_s *s,
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/* TODO: theoretically if ch->sync && ch->prefetch &&
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* !s->dma->drqbmp[ch->sync], we should also activate and fetch
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* from source and then stall until signalled. */
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if ((!ch->sync) || (s->dma->drqbmp & (1 << ch->sync)))
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if ((!ch->sync) || (s->dma->drqbmp & (1ULL << ch->sync))) {
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omap_dma_activate_channel(s, ch);
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}
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}
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}
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@ -1551,12 +1552,12 @@ static void omap_dma_request(void *opaque, int drq, int req)
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struct omap_dma_s *s = (struct omap_dma_s *) opaque;
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/* The request pins are level triggered in QEMU. */
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if (req) {
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if (~s->dma->drqbmp & (1 << drq)) {
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s->dma->drqbmp |= 1 << drq;
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if (~s->dma->drqbmp & (1ULL << drq)) {
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s->dma->drqbmp |= 1ULL << drq;
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omap_dma_process_request(s, drq);
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}
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} else
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s->dma->drqbmp &= ~(1 << drq);
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s->dma->drqbmp &= ~(1ULL << drq);
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}
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/* XXX: this won't be needed once soc_dma knows about clocks. */
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