hw/dma/omap_dma: Fix bugs with DMA requests above 32

The drqbmp field of struct soc_dma_s is a uint64_t; however several
places in the code attempt to set bits in it using "(1 << drq)",
which will fail if drq is large enough that the 1 bit gets shifted
off the top of a 32 bit integer.  Change these to "(1ULL << drq)" so
that the promotion to 64 bit happens before the shift rather than
afterwards.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1372423919-5669-1-git-send-email-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2013-06-28 13:51:59 +01:00
parent 8827b0fb66
commit 7648673636

View File

@ -248,7 +248,7 @@ static void omap_dma_deactivate_channel(struct omap_dma_s *s,
/* Don't deactive the channel if it is synchronized and the DMA request is
active */
if (ch->sync && ch->enable && (s->dma->drqbmp & (1 << ch->sync)))
if (ch->sync && ch->enable && (s->dma->drqbmp & (1ULL << ch->sync)))
return;
if (ch->active) {
@ -268,8 +268,9 @@ static void omap_dma_enable_channel(struct omap_dma_s *s,
/* TODO: theoretically if ch->sync && ch->prefetch &&
* !s->dma->drqbmp[ch->sync], we should also activate and fetch
* from source and then stall until signalled. */
if ((!ch->sync) || (s->dma->drqbmp & (1 << ch->sync)))
if ((!ch->sync) || (s->dma->drqbmp & (1ULL << ch->sync))) {
omap_dma_activate_channel(s, ch);
}
}
}
@ -1551,12 +1552,12 @@ static void omap_dma_request(void *opaque, int drq, int req)
struct omap_dma_s *s = (struct omap_dma_s *) opaque;
/* The request pins are level triggered in QEMU. */
if (req) {
if (~s->dma->drqbmp & (1 << drq)) {
s->dma->drqbmp |= 1 << drq;
if (~s->dma->drqbmp & (1ULL << drq)) {
s->dma->drqbmp |= 1ULL << drq;
omap_dma_process_request(s, drq);
}
} else
s->dma->drqbmp &= ~(1 << drq);
s->dma->drqbmp &= ~(1ULL << drq);
}
/* XXX: this won't be needed once soc_dma knows about clocks. */