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target-ppc: consolidate store operations

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Implement macro to consolidate store operations using newer
tcg_gen_qemu_st function.

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Nikunj A Dadhania 2016-09-12 12:11:33 +05:30 committed by David Gibson
parent ff5f3981a2
commit 761a89c641
1 changed files with 17 additions and 20 deletions
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37
target-ppc/translate.c
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@ -2498,30 +2498,27 @@ GEN_QEMU_LOAD_64(ld64, DEF_MEMOP(MO_Q))
GEN_QEMU_LOAD_64(ld64ur, BSWAP_MEMOP(MO_Q)) GEN_QEMU_LOAD_64(ld64ur, BSWAP_MEMOP(MO_Q))
#endif #endif
static inline void gen_qemu_st8(DisasContext *ctx, TCGv arg1, TCGv arg2) #define GEN_QEMU_STORE_TL(stop, op) \
{ static void glue(gen_qemu_, stop)(DisasContext *ctx, \
tcg_gen_qemu_st8(arg1, arg2, ctx->mem_idx); TCGv val, \
TCGv addr) \
{ \
tcg_gen_qemu_st_tl(val, addr, ctx->mem_idx, op); \
} }
static inline void gen_qemu_st16(DisasContext *ctx, TCGv arg1, TCGv arg2) GEN_QEMU_STORE_TL(st8, DEF_MEMOP(MO_UB))
{ GEN_QEMU_STORE_TL(st16, DEF_MEMOP(MO_UW))
TCGMemOp op = MO_UW | ctx->default_tcg_memop_mask; GEN_QEMU_STORE_TL(st32, DEF_MEMOP(MO_UL))
tcg_gen_qemu_st_tl(arg1, arg2, ctx->mem_idx, op);
#define GEN_QEMU_STORE_64(stop, op) \
static void glue(gen_qemu_, glue(stop, _i64))(DisasContext *ctx, \
TCGv_i64 val, \
TCGv addr) \
{ \
tcg_gen_qemu_st_i64(val, addr, ctx->mem_idx, op); \
} }
static inline void gen_qemu_st32(DisasContext *ctx, TCGv arg1, TCGv arg2) GEN_QEMU_STORE_64(st32, DEF_MEMOP(MO_UL))
{
TCGMemOp op = MO_UL | ctx->default_tcg_memop_mask;
tcg_gen_qemu_st_tl(arg1, arg2, ctx->mem_idx, op);
}
static void gen_qemu_st32_i64(DisasContext *ctx, TCGv_i64 val, TCGv addr)
{
TCGv tmp = tcg_temp_new();
tcg_gen_trunc_i64_tl(tmp, val);
gen_qemu_st32(ctx, tmp, addr);
tcg_temp_free(tmp);
}
static inline void gen_qemu_st64(DisasContext *ctx, TCGv_i64 arg1, TCGv arg2) static inline void gen_qemu_st64(DisasContext *ctx, TCGv_i64 arg1, TCGv arg2)
{ {