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hw/riscv: Sort the Kconfig options in alphabetical order

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At present the Kconfig file is in disorder. Let's sort the options.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1599129623-68957-13-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Bin Meng 2020-09-03 18:40:23 +08:00 committed by Alistair Francis
parent 4791b4c4ab
commit 7595a65818
1 changed files with 30 additions and 30 deletions
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60
hw/riscv/Kconfig
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@ -1,6 +1,36 @@
config IBEX
bool
config MICROCHIP_PFSOC
bool
select CADENCE_SDHCI
select MCHP_PFSOC_MMUART
select MSI_NONBROKEN
select SIFIVE_CLINT
select SIFIVE_PDMA
select SIFIVE_PLIC
select UNIMP
config OPENTITAN
bool
select IBEX
select UNIMP
config RISCV_VIRT
bool
imply PCI_DEVICES
imply TEST_DEVICES
select GOLDFISH_RTC
select MSI_NONBROKEN
select PCI
select PCI_EXPRESS_GENERIC_BRIDGE
select PFLASH_CFI01
select SERIAL
select SIFIVE_CLINT
select SIFIVE_PLIC
select SIFIVE_TEST
select VIRTIO_MMIO
config SIFIVE_E
bool
select MSI_NONBROKEN
@ -30,33 +60,3 @@ config SPIKE
select MSI_NONBROKEN
select SIFIVE_CLINT
select SIFIVE_PLIC
config OPENTITAN
bool
select IBEX
select UNIMP
config RISCV_VIRT
bool
imply PCI_DEVICES
imply TEST_DEVICES
select MSI_NONBROKEN
select PCI
select SERIAL
select GOLDFISH_RTC
select VIRTIO_MMIO
select PCI_EXPRESS_GENERIC_BRIDGE
select PFLASH_CFI01
select SIFIVE_CLINT
select SIFIVE_PLIC
select SIFIVE_TEST
config MICROCHIP_PFSOC
bool
select MSI_NONBROKEN
select SIFIVE_CLINT
select UNIMP
select MCHP_PFSOC_MMUART
select SIFIVE_PDMA
select SIFIVE_PLIC
select CADENCE_SDHCI