a9mpcore: Split off instance_init
Prepares for QOM realize. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
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@ -34,6 +34,14 @@ static void a9mp_priv_set_irq(void *opaque, int irq, int level)
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qemu_set_irq(qdev_get_gpio_in(s->gic, irq), level);
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}
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static void a9mp_priv_initfn(Object *obj)
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{
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A9MPPrivState *s = A9MPCORE_PRIV(obj);
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memory_region_init(&s->container, obj, "a9mp-priv-container", 0x2000);
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sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->container);
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}
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static int a9mp_priv_init(SysBusDevice *dev)
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{
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A9MPPrivState *s = A9MPCORE_PRIV(dev);
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@ -78,7 +86,6 @@ static int a9mp_priv_init(SysBusDevice *dev)
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*
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* We should implement the global timer but don't currently do so.
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*/
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memory_region_init(&s->container, OBJECT(s), "a9mp-priv-container", 0x2000);
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memory_region_add_subregion(&s->container, 0,
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sysbus_mmio_get_region(scubusdev, 0));
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/* GIC CPU interface */
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@ -94,8 +101,6 @@ static int a9mp_priv_init(SysBusDevice *dev)
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memory_region_add_subregion(&s->container, 0x1000,
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sysbus_mmio_get_region(gicbusdev, 0));
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sysbus_init_mmio(dev, &s->container);
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/* Wire up the interrupt from each watchdog and timer.
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* For each core the timer is PPI 29 and the watchdog PPI 30.
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*/
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@ -134,6 +139,7 @@ static const TypeInfo a9mp_priv_info = {
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.name = TYPE_A9MPCORE_PRIV,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(A9MPPrivState),
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.instance_init = a9mp_priv_initfn,
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.class_init = a9mp_priv_class_init,
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};
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