Fix PowerMac NVRAM device.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3521 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -26,6 +26,9 @@
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#include "ppc_mac.h"
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#include "ppc_mac.h"
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struct MacIONVRAMState {
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struct MacIONVRAMState {
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target_phys_addr_t mem_base;
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target_phys_addr_t size;
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int mem_index;
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uint8_t data[0x2000];
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uint8_t data[0x2000];
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};
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};
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@ -58,6 +61,8 @@ static void macio_nvram_writeb (void *opaque,
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target_phys_addr_t addr, uint32_t value)
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target_phys_addr_t addr, uint32_t value)
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{
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{
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MacIONVRAMState *s = opaque;
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MacIONVRAMState *s = opaque;
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addr -= s->mem_base;
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addr = (addr >> 4) & 0x1fff;
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addr = (addr >> 4) & 0x1fff;
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s->data[addr] = value;
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s->data[addr] = value;
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// printf("macio_nvram_writeb %04x = %02x\n", addr, value);
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// printf("macio_nvram_writeb %04x = %02x\n", addr, value);
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@ -68,6 +73,7 @@ static uint32_t macio_nvram_readb (void *opaque, target_phys_addr_t addr)
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MacIONVRAMState *s = opaque;
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MacIONVRAMState *s = opaque;
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uint32_t value;
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uint32_t value;
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addr -= s->mem_base;
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addr = (addr >> 4) & 0x1fff;
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addr = (addr >> 4) & 0x1fff;
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value = s->data[addr];
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value = s->data[addr];
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// printf("macio_nvram_readb %04x = %02x\n", addr, value);
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// printf("macio_nvram_readb %04x = %02x\n", addr, value);
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@ -87,17 +93,29 @@ static CPUReadMemoryFunc *nvram_read[] = {
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&macio_nvram_readb,
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&macio_nvram_readb,
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};
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};
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MacIONVRAMState *macio_nvram_init (int *mem_index)
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MacIONVRAMState *macio_nvram_init (int *mem_index, target_phys_addr_t size)
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{
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{
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MacIONVRAMState *s;
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MacIONVRAMState *s;
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s = qemu_mallocz(sizeof(MacIONVRAMState));
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s = qemu_mallocz(sizeof(MacIONVRAMState));
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if (!s)
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if (!s)
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return NULL;
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return NULL;
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*mem_index = cpu_register_io_memory(0, nvram_read, nvram_write, s);
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s->size = size;
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s->mem_index = cpu_register_io_memory(0, nvram_read, nvram_write, s);
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*mem_index = s->mem_index;
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return s;
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return s;
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}
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}
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void macio_nvram_map (void *opaque, target_phys_addr_t mem_base)
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{
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MacIONVRAMState *s;
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s = opaque;
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s->mem_base = mem_base;
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cpu_register_physical_memory(mem_base, s->size, s->mem_index);
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}
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static uint8_t nvram_chksum (const uint8_t *buf, int n)
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static uint8_t nvram_chksum (const uint8_t *buf, int n)
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{
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{
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int sum, i;
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int sum, i;
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12
hw/macio.c
12
hw/macio.c
@ -31,7 +31,7 @@ struct macio_state_t {
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int pic_mem_index;
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int pic_mem_index;
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int dbdma_mem_index;
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int dbdma_mem_index;
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int cuda_mem_index;
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int cuda_mem_index;
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int nvram_mem_index;
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void *nvram;
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int nb_ide;
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int nb_ide;
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int ide_mem_index[4];
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int ide_mem_index[4];
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};
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};
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@ -68,14 +68,12 @@ static void macio_map (PCIDevice *pci_dev, int region_num,
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macio_state->ide_mem_index[i]);
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macio_state->ide_mem_index[i]);
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}
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}
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}
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}
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if (macio_state->nvram_mem_index >= 0) {
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if (macio_state->nvram != NULL)
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cpu_register_physical_memory(addr + 0x60000, 0x20000,
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macio_nvram_map(macio_state->nvram, addr + 0x60000);
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macio_state->nvram_mem_index);
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}
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}
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}
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void macio_init (PCIBus *bus, int device_id, int is_oldworld, int pic_mem_index,
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void macio_init (PCIBus *bus, int device_id, int is_oldworld, int pic_mem_index,
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int dbdma_mem_index, int cuda_mem_index, int nvram_mem_index,
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int dbdma_mem_index, int cuda_mem_index, void *nvram,
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int nb_ide, int *ide_mem_index)
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int nb_ide, int *ide_mem_index)
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{
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{
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PCIDevice *d;
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PCIDevice *d;
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@ -90,7 +88,7 @@ void macio_init (PCIBus *bus, int device_id, int is_oldworld, int pic_mem_index,
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macio_state->pic_mem_index = pic_mem_index;
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macio_state->pic_mem_index = pic_mem_index;
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macio_state->dbdma_mem_index = dbdma_mem_index;
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macio_state->dbdma_mem_index = dbdma_mem_index;
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macio_state->cuda_mem_index = cuda_mem_index;
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macio_state->cuda_mem_index = cuda_mem_index;
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macio_state->nvram_mem_index = nvram_mem_index;
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macio_state->nvram = nvram;
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if (nb_ide > 4)
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if (nb_ide > 4)
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nb_ide = 4;
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nb_ide = 4;
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macio_state->nb_ide = nb_ide;
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macio_state->nb_ide = nb_ide;
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@ -264,7 +264,7 @@ static void ppc_core99_init (int ram_size, int vga_ram_size,
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dbdma_init(&dbdma_mem_index);
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dbdma_init(&dbdma_mem_index);
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macio_init(pci_bus, 0x0022, 0, pic_mem_index, dbdma_mem_index,
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macio_init(pci_bus, 0x0022, 0, pic_mem_index, dbdma_mem_index,
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cuda_mem_index, -1, 2, ide_mem_index);
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cuda_mem_index, NULL, 2, ide_mem_index);
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if (usb_enabled) {
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if (usb_enabled) {
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usb_ohci_init_pci(pci_bus, 3, -1);
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usb_ohci_init_pci(pci_bus, 3, -1);
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@ -274,9 +274,9 @@ static void ppc_core99_init (int ram_size, int vga_ram_size,
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graphic_depth = 15;
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graphic_depth = 15;
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#if 0 /* XXX: this is ugly but needed for now, or OHW won't boot */
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#if 0 /* XXX: this is ugly but needed for now, or OHW won't boot */
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/* The NewWorld NVRAM is not located in the MacIO device */
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/* The NewWorld NVRAM is not located in the MacIO device */
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nvr = macio_nvram_init(&nvram_mem_index);
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nvr = macio_nvram_init(&nvram_mem_index, 0x2000);
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pmac_format_nvram_partition(nvr, 0x2000);
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pmac_format_nvram_partition(nvr, 0x2000);
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cpu_register_physical_memory(0xFFF04000, 0x20000, nvram_mem_index);
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macio_nvram_map(nvr, 0xFFF04000);
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nvram.opaque = nvr;
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nvram.opaque = nvr;
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nvram.read_fn = &macio_nvram_read;
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nvram.read_fn = &macio_nvram_read;
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nvram.write_fn = &macio_nvram_write;
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nvram.write_fn = &macio_nvram_write;
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@ -43,7 +43,7 @@ void cuda_init (int *cuda_mem_index, qemu_irq irq);
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/* MacIO */
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/* MacIO */
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void macio_init (PCIBus *bus, int device_id, int is_oldworld, int pic_mem_index,
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void macio_init (PCIBus *bus, int device_id, int is_oldworld, int pic_mem_index,
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int dbdma_mem_index, int cuda_mem_index, int nvram_mem_index,
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int dbdma_mem_index, int cuda_mem_index, void *nvram,
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int nb_ide, int *ide_mem_index);
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int nb_ide, int *ide_mem_index);
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/* NewWorld PowerMac IDE */
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/* NewWorld PowerMac IDE */
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@ -62,7 +62,8 @@ PCIBus *pci_pmac_init(qemu_irq *pic);
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/* Mac NVRAM */
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/* Mac NVRAM */
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typedef struct MacIONVRAMState MacIONVRAMState;
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typedef struct MacIONVRAMState MacIONVRAMState;
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MacIONVRAMState *macio_nvram_init (int *mem_index);
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MacIONVRAMState *macio_nvram_init (int *mem_index, target_phys_addr_t size);
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void macio_nvram_map (void *opaque, target_phys_addr_t mem_base);
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void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len);
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void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len);
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uint32_t macio_nvram_read (void *opaque, uint32_t addr);
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uint32_t macio_nvram_read (void *opaque, uint32_t addr);
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void macio_nvram_write (void *opaque, uint32_t addr, uint32_t val);
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void macio_nvram_write (void *opaque, uint32_t addr, uint32_t val);
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@ -271,13 +271,13 @@ static void ppc_heathrow_init (int ram_size, int vga_ram_size,
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adb_kbd_init(&adb_bus);
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adb_kbd_init(&adb_bus);
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adb_mouse_init(&adb_bus);
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adb_mouse_init(&adb_bus);
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nvr = macio_nvram_init(&nvram_mem_index);
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nvr = macio_nvram_init(&nvram_mem_index, 0x2000);
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pmac_format_nvram_partition(nvr, 0x2000);
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pmac_format_nvram_partition(nvr, 0x2000);
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dbdma_init(&dbdma_mem_index);
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dbdma_init(&dbdma_mem_index);
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macio_init(pci_bus, 0x0017, 1, pic_mem_index, dbdma_mem_index,
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macio_init(pci_bus, 0x0017, 1, pic_mem_index, dbdma_mem_index,
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cuda_mem_index, nvram_mem_index, 0, NULL);
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cuda_mem_index, nvr, 0, NULL);
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if (usb_enabled) {
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if (usb_enabled) {
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usb_ohci_init_pci(pci_bus, 3, -1);
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usb_ohci_init_pci(pci_bus, 3, -1);
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