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hw/block/nvme: Align I/O BAR to 4 KiB

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Simplify the NVMe emulated device by aligning the I/O BAR to 4 KiB.

Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Reviewed-by: Klaus Jensen <k.jensen@samsung.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20200630110429.19972-5-philmd@redhat.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
This commit is contained in:
Philippe Mathieu-Daudé 2020-06-30 13:04:29 +02:00 committed by Klaus Jensen
parent af4a367d15
commit 74e18435c0
2 changed files with 4 additions and 3 deletions
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5
hw/block/nvme.c
View File

@ -55,7 +55,6 @@
#include "nvme.h" #include "nvme.h"
#define NVME_MAX_IOQPAIRS 0xffff #define NVME_MAX_IOQPAIRS 0xffff
#define NVME_REG_SIZE 0x1000
#define NVME_DB_SIZE 4 #define NVME_DB_SIZE 4
#define NVME_CMB_BIR 2 #define NVME_CMB_BIR 2
#define NVME_PMR_BIR 2 #define NVME_PMR_BIR 2
@ -1322,7 +1321,7 @@ static void nvme_mmio_write(void *opaque, hwaddr addr, uint64_t data,
NvmeCtrl *n = (NvmeCtrl *)opaque; NvmeCtrl *n = (NvmeCtrl *)opaque;
if (addr < sizeof(n->bar)) { if (addr < sizeof(n->bar)) {
nvme_write_bar(n, addr, data, size); nvme_write_bar(n, addr, data, size);
} else if (addr >= 0x1000) { } else {
nvme_process_db(n, addr, data); nvme_process_db(n, addr, data);
} }
} }
@ -1415,7 +1414,7 @@ static void nvme_init_state(NvmeCtrl *n)
{ {
n->num_namespaces = 1; n->num_namespaces = 1;
/* add one to max_ioqpairs to account for the admin queue pair */ /* add one to max_ioqpairs to account for the admin queue pair */
n->reg_size = pow2ceil(NVME_REG_SIZE + n->reg_size = pow2ceil(sizeof(NvmeBar) +
2 * (n->params.max_ioqpairs + 1) * NVME_DB_SIZE); 2 * (n->params.max_ioqpairs + 1) * NVME_DB_SIZE);
n->namespaces = g_new0(NvmeNamespace, n->num_namespaces); n->namespaces = g_new0(NvmeNamespace, n->num_namespaces);
n->sq = g_new0(NvmeSQueue *, n->params.max_ioqpairs + 1); n->sq = g_new0(NvmeSQueue *, n->params.max_ioqpairs + 1);

2
include/block/nvme.h
View File

@ -22,6 +22,7 @@ typedef struct QEMU_PACKED NvmeBar {
uint32_t pmrebs; uint32_t pmrebs;
uint32_t pmrswtp; uint32_t pmrswtp;
uint64_t pmrmsc; uint64_t pmrmsc;
uint8_t reserved[484];
} NvmeBar; } NvmeBar;
enum NvmeCapShift { enum NvmeCapShift {
@ -879,6 +880,7 @@ enum NvmeIdNsDps {
static inline void _nvme_check_size(void) static inline void _nvme_check_size(void)
{ {
QEMU_BUILD_BUG_ON(sizeof(NvmeBar) != 4096);
QEMU_BUILD_BUG_ON(sizeof(NvmeAerResult) != 4); QEMU_BUILD_BUG_ON(sizeof(NvmeAerResult) != 4);
QEMU_BUILD_BUG_ON(sizeof(NvmeCqe) != 16); QEMU_BUILD_BUG_ON(sizeof(NvmeCqe) != 16);
QEMU_BUILD_BUG_ON(sizeof(NvmeDsmRange) != 16); QEMU_BUILD_BUG_ON(sizeof(NvmeDsmRange) != 16);