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pci/bridge: clean up of pci_bridge_initfn()

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- use symbolic constant
- use helper function pci_set_xxx()
- removed lines which initializes to 0.
  It is unnecessary because it is already zeroed.
- add some comments on command registers.

Some initial values are suspicious because they seems to
be specific to apb_pci.c which is the only user of pci bridge right now.
For now don't touch those values to avoid breakage.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Isaku Yamahata 2009-10-30 21:21:01 +09:00 committed by Anthony Liguori
parent b0ff8eb2d0
commit 74c01823ba
1 changed files with 25 additions and 11 deletions
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36
hw/pci.c
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@ -922,17 +922,31 @@ static int pci_bridge_initfn(PCIDevice *dev)
pci_config_set_vendor_id(s->dev.config, s->vid); pci_config_set_vendor_id(s->dev.config, s->vid);
pci_config_set_device_id(s->dev.config, s->did); pci_config_set_device_id(s->dev.config, s->did);
s->dev.config[0x04] = 0x06; // command = bus master, pci mem /* TODO: intial value
s->dev.config[0x05] = 0x00; * command register:
s->dev.config[0x06] = 0xa0; // status = fast back-to-back, 66MHz, no error * According to PCI bridge spec, after reset
s->dev.config[0x07] = 0x00; // status = fast devsel * bus master bit is off
s->dev.config[0x08] = 0x00; // revision * memory space enable bit is off
s->dev.config[0x09] = 0x00; // programming i/f * According to manual (805-1251.pdf).(See abp_pbi.c for its links.)
pci_config_set_class(s->dev.config, PCI_CLASS_BRIDGE_PCI); * the reset value should be zero unless the boot pin is tied high
s->dev.config[0x0D] = 0x10; // latency_timer * (which is tru) and thus it should be PCI_COMMAND_MEMORY.
s->dev.config[PCI_HEADER_TYPE] = *
PCI_HEADER_TYPE_MULTI_FUNCTION | PCI_HEADER_TYPE_BRIDGE; // header_type * For now, don't touch the value.
s->dev.config[0x1E] = 0xa0; // secondary status * Later command register will be set to zero and apb_pci.c will
* override the value.
* Same for latency timer, and multi function bit of header type.
*/
pci_set_word(dev->config + PCI_COMMAND,
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
pci_set_word(dev->config + PCI_STATUS,
PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK);
pci_config_set_class(dev->config, PCI_CLASS_BRIDGE_PCI);
dev->config[PCI_LATENCY_TIMER] = 0x10;
dev->config[PCI_HEADER_TYPE] =
PCI_HEADER_TYPE_MULTI_FUNCTION | PCI_HEADER_TYPE_BRIDGE;
pci_set_word(dev->config + PCI_SEC_STATUS,
PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK);
return 0; return 0;
} }