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watchdog: aspeed: Fix sequential control writes

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The logic in the handling for the control register required toggling the
enable state for writes to stick. Rework the condition chain to allow
sequential writes that do not update the enable state.

Fixes: 854123bf8d ("wdt: Add Aspeed watchdog device model")
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210709053107.1829304-3-andrew@aj.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
This commit is contained in:
Andrew Jeffery 2021-09-20 08:50:59 +02:00 committed by Cédric Le Goater
parent 709098fd37
commit 74b67e1f9d
1 changed files with 2 additions and 0 deletions
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hw/watchdog/wdt_aspeed.c
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@ -166,6 +166,8 @@ static void aspeed_wdt_write(void *opaque, hwaddr offset, uint64_t data,
} else if (!enable && aspeed_wdt_is_enabled(s)) {
s->regs[WDT_CTRL] = data;
timer_del(s->timer);
} else {
s->regs[WDT_CTRL] = data;
}
break;
case WDT_RESET_WIDTH: