hw/nvme updates
-----BEGIN PGP SIGNATURE----- iQEzBAABCAAdFiEEUigzqnXi3OaiR2bATeGvMW1PDekFAmFNc8cACgkQTeGvMW1P DenHHAf/cBGkS2TttHukKGmM20lyQXd/imFGD9xKYO/Y5Auo/QyfKQDn/MfHS0lk w17qDpIjgJs04w5MlUyop0k20KlF2d+WZIoaDR1XQ4cvUzAlK/L2tjU54Cpoo7Rq KTRou/yk7Wz9YK4P3D5gSWv54D6ob4YxYwcMCyam5rXlaUkofcZx21FywIVaZPV/ hZwFgoEXJLE2tmeiSkoEdsaPKXtmw5/kYQcBNo/mVwkenypoLQM1+cJX0IIo5Ajq xz4SzGScEM4gOxYWSd568ieAimvNDxm4DOn4dDN8hueLq+hS1J1Zw+FzRW0XcyXZ muNAOdBFX8FkE7/wO3hBknuM8nLihw== =msa0 -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/nvme/tags/nvme-next-pull-request' into staging hw/nvme updates # gpg: Signature made Fri 24 Sep 2021 07:44:23 BST # gpg: using RSA key 522833AA75E2DCE6A24766C04DE1AF316D4F0DE9 # gpg: Good signature from "Klaus Jensen <its@irrelevant.dk>" [unknown] # gpg: aka "Klaus Jensen <k.jensen@samsung.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: DDCA 4D9C 9EF9 31CC 3468 4272 63D5 6FC5 E55D A838 # Subkey fingerprint: 5228 33AA 75E2 DCE6 A247 66C0 4DE1 AF31 6D4F 0DE9 * remotes/nvme/tags/nvme-next-pull-request: hw/nvme: Return error for fused operations hw/nvme: fix verification of select field in namespace attachment hw/nvme: fix validation of ASQ and ACQ Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
73257aa023
@ -3893,6 +3893,10 @@ static uint16_t nvme_io_cmd(NvmeCtrl *n, NvmeRequest *req)
|
||||
return ns->status;
|
||||
}
|
||||
|
||||
if (NVME_CMD_FLAGS_FUSE(req->cmd.flags)) {
|
||||
return NVME_INVALID_FIELD;
|
||||
}
|
||||
|
||||
req->ns = ns;
|
||||
|
||||
switch (req->cmd.opcode) {
|
||||
@ -5191,7 +5195,7 @@ static uint16_t nvme_ns_attachment(NvmeCtrl *n, NvmeRequest *req)
|
||||
uint16_t list[NVME_CONTROLLER_LIST_SIZE] = {};
|
||||
uint32_t nsid = le32_to_cpu(req->cmd.nsid);
|
||||
uint32_t dw10 = le32_to_cpu(req->cmd.cdw10);
|
||||
bool attach = !(dw10 & 0xf);
|
||||
uint8_t sel = dw10 & 0xf;
|
||||
uint16_t *nr_ids = &list[0];
|
||||
uint16_t *ids = &list[1];
|
||||
uint16_t ret;
|
||||
@ -5224,7 +5228,8 @@ static uint16_t nvme_ns_attachment(NvmeCtrl *n, NvmeRequest *req)
|
||||
return NVME_NS_CTRL_LIST_INVALID | NVME_DNR;
|
||||
}
|
||||
|
||||
if (attach) {
|
||||
switch (sel) {
|
||||
case NVME_NS_ATTACHMENT_ATTACH:
|
||||
if (nvme_ns(ctrl, nsid)) {
|
||||
return NVME_NS_ALREADY_ATTACHED | NVME_DNR;
|
||||
}
|
||||
@ -5235,7 +5240,10 @@ static uint16_t nvme_ns_attachment(NvmeCtrl *n, NvmeRequest *req)
|
||||
|
||||
nvme_attach_ns(ctrl, ns);
|
||||
nvme_select_iocs_ns(ctrl, ns);
|
||||
} else {
|
||||
|
||||
break;
|
||||
|
||||
case NVME_NS_ATTACHMENT_DETACH:
|
||||
if (!nvme_ns(ctrl, nsid)) {
|
||||
return NVME_NS_NOT_ATTACHED | NVME_DNR;
|
||||
}
|
||||
@ -5244,6 +5252,11 @@ static uint16_t nvme_ns_attachment(NvmeCtrl *n, NvmeRequest *req)
|
||||
ns->attached--;
|
||||
|
||||
nvme_update_dmrsl(ctrl);
|
||||
|
||||
break;
|
||||
|
||||
default:
|
||||
return NVME_INVALID_FIELD | NVME_DNR;
|
||||
}
|
||||
|
||||
/*
|
||||
@ -5466,6 +5479,10 @@ static uint16_t nvme_admin_cmd(NvmeCtrl *n, NvmeRequest *req)
|
||||
return NVME_INVALID_FIELD | NVME_DNR;
|
||||
}
|
||||
|
||||
if (NVME_CMD_FLAGS_FUSE(req->cmd.flags)) {
|
||||
return NVME_INVALID_FIELD;
|
||||
}
|
||||
|
||||
switch (req->cmd.opcode) {
|
||||
case NVME_ADM_CMD_DELETE_SQ:
|
||||
return nvme_del_sq(n, req);
|
||||
@ -5623,14 +5640,6 @@ static int nvme_start_ctrl(NvmeCtrl *n)
|
||||
trace_pci_nvme_err_startfail_sq();
|
||||
return -1;
|
||||
}
|
||||
if (unlikely(!asq)) {
|
||||
trace_pci_nvme_err_startfail_nbarasq();
|
||||
return -1;
|
||||
}
|
||||
if (unlikely(!acq)) {
|
||||
trace_pci_nvme_err_startfail_nbaracq();
|
||||
return -1;
|
||||
}
|
||||
if (unlikely(asq & (page_size - 1))) {
|
||||
trace_pci_nvme_err_startfail_asq_misaligned(asq);
|
||||
return -1;
|
||||
|
@ -159,8 +159,6 @@ pci_nvme_err_invalid_setfeat(uint32_t dw10) "invalid set features, dw10=0x%"PRIx
|
||||
pci_nvme_err_invalid_log_page(uint16_t cid, uint16_t lid) "cid %"PRIu16" lid 0x%"PRIx16""
|
||||
pci_nvme_err_startfail_cq(void) "nvme_start_ctrl failed because there are non-admin completion queues"
|
||||
pci_nvme_err_startfail_sq(void) "nvme_start_ctrl failed because there are non-admin submission queues"
|
||||
pci_nvme_err_startfail_nbarasq(void) "nvme_start_ctrl failed because the admin submission queue address is null"
|
||||
pci_nvme_err_startfail_nbaracq(void) "nvme_start_ctrl failed because the admin completion queue address is null"
|
||||
pci_nvme_err_startfail_asq_misaligned(uint64_t addr) "nvme_start_ctrl failed because the admin submission queue address is misaligned: 0x%"PRIx64""
|
||||
pci_nvme_err_startfail_acq_misaligned(uint64_t addr) "nvme_start_ctrl failed because the admin completion queue address is misaligned: 0x%"PRIx64""
|
||||
pci_nvme_err_startfail_page_too_small(uint8_t log2ps, uint8_t maxlog2ps) "nvme_start_ctrl failed because the page size is too small: log2size=%u, min=%u"
|
||||
|
@ -1154,6 +1154,11 @@ enum NvmeIdCtrlCmic {
|
||||
NVME_CMIC_MULTI_CTRL = 1 << 1,
|
||||
};
|
||||
|
||||
enum NvmeNsAttachmentOperation {
|
||||
NVME_NS_ATTACHMENT_ATTACH = 0x0,
|
||||
NVME_NS_ATTACHMENT_DETACH = 0x1,
|
||||
};
|
||||
|
||||
#define NVME_CTRL_SQES_MIN(sqes) ((sqes) & 0xf)
|
||||
#define NVME_CTRL_SQES_MAX(sqes) (((sqes) >> 4) & 0xf)
|
||||
#define NVME_CTRL_CQES_MIN(cqes) ((cqes) & 0xf)
|
||||
|
Loading…
Reference in New Issue
Block a user