hw/isa/superio: Factor out the FDC37M817 Super I/O from mips_malta.c
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180308223946.26784-17-f4bug@amsat.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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78f16256c1
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@ -187,9 +187,28 @@ static const TypeInfo isa_superio_type_info = {
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.class_init = isa_superio_class_init,
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};
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/* SMS FDC37M817 Super I/O */
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static void fdc37m81x_class_init(ObjectClass *klass, void *data)
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{
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ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass);
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sc->serial.count = 2; /* NS16C550A */
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sc->parallel.count = 1;
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sc->floppy.count = 1; /* SMSC 82077AA Compatible */
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sc->ide.count = 0;
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}
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static const TypeInfo fdc37m81x_type_info = {
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.name = TYPE_FDC37M81X_SUPERIO,
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.parent = TYPE_ISA_SUPERIO,
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.instance_size = sizeof(ISASuperIODevice),
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.class_init = fdc37m81x_class_init,
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};
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static void isa_superio_register_types(void)
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{
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type_register_static(&isa_superio_type_info);
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type_register_static(&fdc37m81x_type_info);
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}
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type_init(isa_superio_register_types)
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@ -27,14 +27,12 @@
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#include "cpu.h"
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#include "hw/hw.h"
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#include "hw/i386/pc.h"
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#include "hw/isa/superio.h"
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#include "hw/dma/i8257.h"
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#include "hw/char/serial.h"
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#include "hw/char/parallel.h"
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#include "hw/block/fdc.h"
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#include "net/net.h"
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#include "hw/boards.h"
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#include "hw/i2c/smbus.h"
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#include "sysemu/block-backend.h"
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#include "hw/block/flash.h"
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#include "hw/mips/mips.h"
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#include "hw/mips/cpudevs.h"
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@ -47,7 +45,6 @@
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#include "hw/loader.h"
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#include "elf.h"
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#include "hw/timer/mc146818rtc.h"
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#include "hw/input/i8042.h"
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#include "hw/timer/i8254.h"
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#include "sysemu/blockdev.h"
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#include "exec/address-spaces.h"
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@ -1005,10 +1002,8 @@ void mips_malta_init(MachineState *machine)
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qemu_irq cbus_irq, i8259_irq;
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int piix4_devfn;
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I2CBus *smbus;
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int i;
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DriveInfo *dinfo;
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DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
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DriveInfo *fd[MAX_FD];
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int fl_idx = 0;
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int fl_sectors = bios_size >> 16;
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int be;
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@ -1023,15 +1018,6 @@ void mips_malta_init(MachineState *machine)
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qdev_init_nofail(dev);
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/* Make sure the first 3 serial ports are associated with a device. */
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for(i = 0; i < 3; i++) {
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if (!serial_hds[i]) {
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char label[32];
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snprintf(label, sizeof(label), "serial%d", i);
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serial_hds[i] = qemu_chr_new(label, "null");
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}
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}
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/* create CPU */
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mips_create_cpu(s, machine->cpu_type, &cbus_irq, &i8259_irq);
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@ -1067,7 +1053,14 @@ void mips_malta_init(MachineState *machine)
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#else
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be = 0;
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#endif
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/* FPGA */
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/* Make sure the second serial port is associated with a device. */
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if (!serial_hds[2]) {
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serial_hds[2] = qemu_chr_new("fpga-uart", "null");
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}
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/* The CBUS UART is attached to the MIPS CPU INT2 pin, ie interrupt 4 */
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malta_fpga_init(system_memory, FPGA_ADDRESS, cbus_irq, serial_hds[2]);
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@ -1214,16 +1207,8 @@ void mips_malta_init(MachineState *machine)
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smbus_eeprom_init(smbus, 8, smbus_eeprom_buf, smbus_eeprom_size);
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g_free(smbus_eeprom_buf);
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/* Super I/O */
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isa_create_simple(isa_bus, TYPE_I8042);
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serial_hds_isa_init(isa_bus, 0, 2);
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parallel_hds_isa_init(isa_bus, 1);
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for(i = 0; i < MAX_FD; i++) {
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fd[i] = drive_get(IF_FLOPPY, 0, i);
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}
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fdctrl_init_isa(isa_bus, fd);
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/* Super I/O: SMS FDC37M817 */
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isa_create_simple(isa_bus, TYPE_FDC37M81X_SUPERIO);
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/* Network card */
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network_init(pci_bus);
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@ -54,4 +54,6 @@ typedef struct ISASuperIOClass {
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ISASuperIOFuncs ide;
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} ISASuperIOClass;
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#define TYPE_FDC37M81X_SUPERIO "fdc37m81x-superio"
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#endif /* HW_ISA_SUPERIO_H */
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