openpic/fsl: critical interrupts ignore mask before v4.1
Signed-off-by: Scott Wood <scottwood@freescale.com> [agraf: make bool :1] Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -193,6 +193,7 @@ typedef struct IRQSource {
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int last_cpu;
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int output; /* IRQ level, e.g. OPENPIC_OUTPUT_INT */
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int pending; /* TRUE if IRQ is pending */
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bool nomask:1; /* critical interrupts ignore mask on some FSL MPICs */
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} IRQSource;
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#define IVPR_MASK_SHIFT 31
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@ -389,7 +390,7 @@ static void openpic_update_irq(OpenPICState *opp, int n_IRQ)
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DPRINTF("%s: IRQ %d is not pending\n", __func__, n_IRQ);
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return;
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}
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if (src->ivpr & IVPR_MASK_MASK) {
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if ((src->ivpr & IVPR_MASK_MASK) && !src->nomask) {
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/* Interrupt source is disabled */
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DPRINTF("%s: IRQ %d is disabled\n", __func__, n_IRQ);
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return;
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@ -529,6 +530,7 @@ static inline void write_IRQreg_idr(OpenPICState *opp, int n_IRQ, uint32_t val)
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}
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src->output = OPENPIC_OUTPUT_CINT;
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src->nomask = true;
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src->destmask = 0;
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for (i = 0; i < opp->nb_cpus; i++) {
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@ -540,6 +542,7 @@ static inline void write_IRQreg_idr(OpenPICState *opp, int n_IRQ, uint32_t val)
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}
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} else {
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src->output = OPENPIC_OUTPUT_INT;
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src->nomask = false;
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src->destmask = src->idr & normal_mask;
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}
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} else {
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