hw/mips/boston: Add FDT generator
Generate FDT on our own if no dtb argument supplied. Avoid introducing unused device in FDT with user supplied dtb. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> [PMD: Fix coding style] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211002184539.169-4-jiaxun.yang@flygoat.com>
This commit is contained in:
Jiaxun Yang
Philippe Mathieu-Daudé
parent
10e3f30ff7
commit
723038999e
245
hw/mips/boston.c
245
hw/mips/boston.c
@ -49,6 +49,15 @@ typedef struct BostonState BostonState;
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DECLARE_INSTANCE_CHECKER(BostonState, BOSTON,
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TYPE_BOSTON)
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#define FDT_IRQ_TYPE_NONE 0
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#define FDT_IRQ_TYPE_LEVEL_HIGH 4
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#define FDT_GIC_SHARED 0
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#define FDT_GIC_LOCAL 1
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#define FDT_BOSTON_CLK_SYS 1
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#define FDT_BOSTON_CLK_CPU 2
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#define FDT_PCI_IRQ_MAP_PINS 4
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#define FDT_PCI_IRQ_MAP_DESCS 6
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struct BostonState {
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SysBusDevice parent_obj;
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@ -437,6 +446,222 @@ xilinx_pcie_init(MemoryRegion *sys_mem, uint32_t bus_nr,
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return XILINX_PCIE_HOST(dev);
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}
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static void fdt_create_pcie(void *fdt, int gic_ph, int irq, hwaddr reg_base,
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hwaddr reg_size, hwaddr mmio_base, hwaddr mmio_size)
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{
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int i;
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char *name, *intc_name;
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uint32_t intc_ph;
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uint32_t interrupt_map[FDT_PCI_IRQ_MAP_PINS][FDT_PCI_IRQ_MAP_DESCS];
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intc_ph = qemu_fdt_alloc_phandle(fdt);
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name = g_strdup_printf("/soc/pci@%" HWADDR_PRIx, reg_base);
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qemu_fdt_add_subnode(fdt, name);
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qemu_fdt_setprop_string(fdt, name, "compatible",
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"xlnx,axi-pcie-host-1.00.a");
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qemu_fdt_setprop_string(fdt, name, "device_type", "pci");
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qemu_fdt_setprop_cells(fdt, name, "reg", reg_base, reg_size);
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qemu_fdt_setprop_cell(fdt, name, "#address-cells", 3);
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qemu_fdt_setprop_cell(fdt, name, "#size-cells", 2);
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qemu_fdt_setprop_cell(fdt, name, "#interrupt-cells", 1);
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qemu_fdt_setprop_cell(fdt, name, "interrupt-parent", gic_ph);
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qemu_fdt_setprop_cells(fdt, name, "interrupts", FDT_GIC_SHARED, irq,
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FDT_IRQ_TYPE_LEVEL_HIGH);
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qemu_fdt_setprop_cells(fdt, name, "ranges", 0x02000000, 0, mmio_base,
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mmio_base, 0, mmio_size);
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qemu_fdt_setprop_cells(fdt, name, "bus-range", 0x00, 0xff);
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intc_name = g_strdup_printf("%s/interrupt-controller", name);
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qemu_fdt_add_subnode(fdt, intc_name);
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qemu_fdt_setprop(fdt, intc_name, "interrupt-controller", NULL, 0);
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qemu_fdt_setprop_cell(fdt, intc_name, "#address-cells", 0);
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qemu_fdt_setprop_cell(fdt, intc_name, "#interrupt-cells", 1);
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qemu_fdt_setprop_cell(fdt, intc_name, "phandle", intc_ph);
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qemu_fdt_setprop_cells(fdt, name, "interrupt-map-mask", 0, 0, 0, 7);
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for (i = 0; i < FDT_PCI_IRQ_MAP_PINS; i++) {
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uint32_t *irqmap = interrupt_map[i];
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irqmap[0] = cpu_to_be32(0);
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irqmap[1] = cpu_to_be32(0);
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irqmap[2] = cpu_to_be32(0);
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irqmap[3] = cpu_to_be32(i + 1);
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irqmap[4] = cpu_to_be32(intc_ph);
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irqmap[5] = cpu_to_be32(i + 1);
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}
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qemu_fdt_setprop(fdt, name, "interrupt-map",
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&interrupt_map, sizeof(interrupt_map));
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g_free(intc_name);
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g_free(name);
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}
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static const void *create_fdt(BostonState *s,
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const MemMapEntry *memmap, int *dt_size)
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{
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void *fdt;
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int cpu;
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MachineState *mc = s->mach;
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uint32_t platreg_ph, gic_ph, clk_ph;
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char *name, *gic_name, *platreg_name, *stdout_name;
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static const char * const syscon_compat[2] = {
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"img,boston-platform-regs", "syscon"
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};
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fdt = create_device_tree(dt_size);
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if (!fdt) {
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error_report("create_device_tree() failed");
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exit(1);
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}
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platreg_ph = qemu_fdt_alloc_phandle(fdt);
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gic_ph = qemu_fdt_alloc_phandle(fdt);
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clk_ph = qemu_fdt_alloc_phandle(fdt);
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qemu_fdt_setprop_string(fdt, "/", "model", "img,boston");
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qemu_fdt_setprop_string(fdt, "/", "compatible", "img,boston");
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qemu_fdt_setprop_cell(fdt, "/", "#size-cells", 0x1);
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qemu_fdt_setprop_cell(fdt, "/", "#address-cells", 0x1);
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qemu_fdt_add_subnode(fdt, "/cpus");
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qemu_fdt_setprop_cell(fdt, "/cpus", "#size-cells", 0x0);
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qemu_fdt_setprop_cell(fdt, "/cpus", "#address-cells", 0x1);
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for (cpu = 0; cpu < mc->smp.cpus; cpu++) {
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name = g_strdup_printf("/cpus/cpu@%d", cpu);
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qemu_fdt_add_subnode(fdt, name);
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qemu_fdt_setprop_string(fdt, name, "compatible", "img,mips");
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qemu_fdt_setprop_string(fdt, name, "status", "okay");
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qemu_fdt_setprop_cell(fdt, name, "reg", cpu);
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qemu_fdt_setprop_string(fdt, name, "device_type", "cpu");
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qemu_fdt_setprop_cells(fdt, name, "clocks", clk_ph, FDT_BOSTON_CLK_CPU);
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g_free(name);
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}
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qemu_fdt_add_subnode(fdt, "/soc");
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qemu_fdt_setprop(fdt, "/soc", "ranges", NULL, 0);
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qemu_fdt_setprop_string(fdt, "/soc", "compatible", "simple-bus");
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qemu_fdt_setprop_cell(fdt, "/soc", "#size-cells", 0x1);
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qemu_fdt_setprop_cell(fdt, "/soc", "#address-cells", 0x1);
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fdt_create_pcie(fdt, gic_ph, 2,
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memmap[BOSTON_PCIE0].base, memmap[BOSTON_PCIE0].size,
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memmap[BOSTON_PCIE0_MMIO].base, memmap[BOSTON_PCIE0_MMIO].size);
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fdt_create_pcie(fdt, gic_ph, 1,
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memmap[BOSTON_PCIE1].base, memmap[BOSTON_PCIE1].size,
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memmap[BOSTON_PCIE1_MMIO].base, memmap[BOSTON_PCIE1_MMIO].size);
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fdt_create_pcie(fdt, gic_ph, 0,
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memmap[BOSTON_PCIE2].base, memmap[BOSTON_PCIE2].size,
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memmap[BOSTON_PCIE2_MMIO].base, memmap[BOSTON_PCIE2_MMIO].size);
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/* GIC with it's timer node */
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gic_name = g_strdup_printf("/soc/interrupt-controller@%" HWADDR_PRIx,
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memmap[BOSTON_GIC].base);
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qemu_fdt_add_subnode(fdt, gic_name);
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qemu_fdt_setprop_string(fdt, gic_name, "compatible", "mti,gic");
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qemu_fdt_setprop_cells(fdt, gic_name, "reg", memmap[BOSTON_GIC].base,
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memmap[BOSTON_GIC].size);
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qemu_fdt_setprop(fdt, gic_name, "interrupt-controller", NULL, 0);
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qemu_fdt_setprop_cell(fdt, gic_name, "#interrupt-cells", 3);
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qemu_fdt_setprop_cell(fdt, gic_name, "phandle", gic_ph);
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name = g_strdup_printf("%s/timer", gic_name);
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qemu_fdt_add_subnode(fdt, name);
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qemu_fdt_setprop_string(fdt, name, "compatible", "mti,gic-timer");
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qemu_fdt_setprop_cells(fdt, name, "interrupts", FDT_GIC_LOCAL, 1,
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FDT_IRQ_TYPE_NONE);
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qemu_fdt_setprop_cells(fdt, name, "clocks", clk_ph, FDT_BOSTON_CLK_CPU);
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g_free(name);
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g_free(gic_name);
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/* CDMM node */
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name = g_strdup_printf("/soc/cdmm@%" HWADDR_PRIx, memmap[BOSTON_CDMM].base);
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qemu_fdt_add_subnode(fdt, name);
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qemu_fdt_setprop_string(fdt, name, "compatible", "mti,mips-cdmm");
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qemu_fdt_setprop_cells(fdt, name, "reg", memmap[BOSTON_CDMM].base,
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memmap[BOSTON_CDMM].size);
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g_free(name);
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/* CPC node */
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name = g_strdup_printf("/soc/cpc@%" HWADDR_PRIx, memmap[BOSTON_CPC].base);
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qemu_fdt_add_subnode(fdt, name);
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qemu_fdt_setprop_string(fdt, name, "compatible", "mti,mips-cpc");
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qemu_fdt_setprop_cells(fdt, name, "reg", memmap[BOSTON_CPC].base,
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memmap[BOSTON_CPC].size);
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g_free(name);
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/* platreg and it's clk node */
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platreg_name = g_strdup_printf("/soc/system-controller@%" HWADDR_PRIx,
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memmap[BOSTON_PLATREG].base);
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qemu_fdt_add_subnode(fdt, platreg_name);
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qemu_fdt_setprop_string_array(fdt, platreg_name, "compatible",
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(char **)&syscon_compat,
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ARRAY_SIZE(syscon_compat));
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qemu_fdt_setprop_cells(fdt, platreg_name, "reg",
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memmap[BOSTON_PLATREG].base,
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memmap[BOSTON_PLATREG].size);
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qemu_fdt_setprop_cell(fdt, platreg_name, "phandle", platreg_ph);
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name = g_strdup_printf("%s/clock", platreg_name);
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qemu_fdt_add_subnode(fdt, name);
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qemu_fdt_setprop_string(fdt, name, "compatible", "img,boston-clock");
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qemu_fdt_setprop_cell(fdt, name, "#clock-cells", 1);
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qemu_fdt_setprop_cell(fdt, name, "phandle", clk_ph);
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g_free(name);
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g_free(platreg_name);
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/* reboot node */
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name = g_strdup_printf("/soc/reboot");
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qemu_fdt_add_subnode(fdt, name);
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qemu_fdt_setprop_string(fdt, name, "compatible", "syscon-reboot");
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qemu_fdt_setprop_cell(fdt, name, "regmap", platreg_ph);
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qemu_fdt_setprop_cell(fdt, name, "offset", 0x10);
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qemu_fdt_setprop_cell(fdt, name, "mask", 0x10);
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g_free(name);
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/* uart node */
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name = g_strdup_printf("/soc/uart@%" HWADDR_PRIx, memmap[BOSTON_UART].base);
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qemu_fdt_add_subnode(fdt, name);
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qemu_fdt_setprop_string(fdt, name, "compatible", "ns16550a");
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qemu_fdt_setprop_cells(fdt, name, "reg", memmap[BOSTON_UART].base,
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memmap[BOSTON_UART].size);
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qemu_fdt_setprop_cell(fdt, name, "reg-shift", 0x2);
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qemu_fdt_setprop_cell(fdt, name, "interrupt-parent", gic_ph);
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qemu_fdt_setprop_cells(fdt, name, "interrupts", FDT_GIC_SHARED, 3,
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FDT_IRQ_TYPE_LEVEL_HIGH);
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qemu_fdt_setprop_cells(fdt, name, "clocks", clk_ph, FDT_BOSTON_CLK_SYS);
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qemu_fdt_add_subnode(fdt, "/chosen");
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stdout_name = g_strdup_printf("%s:115200", name);
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qemu_fdt_setprop_string(fdt, "/chosen", "stdout-path", stdout_name);
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g_free(stdout_name);
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g_free(name);
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/* lcd node */
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name = g_strdup_printf("/soc/lcd@%" HWADDR_PRIx, memmap[BOSTON_LCD].base);
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qemu_fdt_add_subnode(fdt, name);
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qemu_fdt_setprop_string(fdt, name, "compatible", "img,boston-lcd");
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qemu_fdt_setprop_cells(fdt, name, "reg", memmap[BOSTON_LCD].base,
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memmap[BOSTON_LCD].size);
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g_free(name);
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name = g_strdup_printf("/memory@0");
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qemu_fdt_add_subnode(fdt, name);
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qemu_fdt_setprop_string(fdt, name, "device_type", "memory");
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g_free(name);
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return fdt;
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}
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static void boston_mach_init(MachineState *machine)
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{
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DeviceState *dev;
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@ -560,22 +785,24 @@ static void boston_mach_init(MachineState *machine)
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NULL, 0, EM_MIPS, 1, 0);
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if (kernel_size) {
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int dt_size;
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g_autofree const void *dtb_file_data, *dtb_load_data;
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hwaddr dtb_paddr = QEMU_ALIGN_UP(kernel_high, 64 * KiB);
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hwaddr dtb_vaddr = cpu_mips_phys_to_kseg0(NULL, dtb_paddr);
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s->kernel_entry = kernel_entry;
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if (machine->dtb) {
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int dt_size;
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g_autofree const void *dtb_file_data, *dtb_load_data;
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dtb_file_data = load_device_tree(machine->dtb, &dt_size);
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dtb_load_data = boston_fdt_filter(s, dtb_file_data,
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NULL, &dtb_vaddr);
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/* Calculate real fdt size after filter */
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dt_size = fdt_totalsize(dtb_load_data);
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rom_add_blob_fixed("dtb", dtb_load_data, dt_size, dtb_paddr);
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} else {
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dtb_file_data = create_fdt(s, boston_memmap, &dt_size);
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}
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dtb_load_data = boston_fdt_filter(s, dtb_file_data,
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NULL, &dtb_vaddr);
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/* Calculate real fdt size after filter */
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dt_size = fdt_totalsize(dtb_load_data);
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rom_add_blob_fixed("dtb", dtb_load_data, dt_size, dtb_paddr);
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} else {
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/* Try to load file as FIT */
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fit_err = load_fit(&boston_fit_loader, machine->kernel_filename, s);
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