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target/i386: add VMX definitions

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These will be used to compile the list of VMX features for named
CPU models, and/or by the code that sets up the VMX MSRs.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2019-07-01 18:24:52 +02:00
parent ede146c2e7
commit 704798add8
1 changed files with 130 additions and 0 deletions
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130
target/i386/cpu.h
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@ -452,6 +452,25 @@ typedef enum X86Seg {
#define MSR_IA32_BNDCFGS 0x00000d90
#define MSR_IA32_XSS 0x00000da0
#define MSR_IA32_VMX_BASIC 0x00000480
#define MSR_IA32_VMX_PINBASED_CTLS 0x00000481
#define MSR_IA32_VMX_PROCBASED_CTLS 0x00000482
#define MSR_IA32_VMX_EXIT_CTLS 0x00000483
#define MSR_IA32_VMX_ENTRY_CTLS 0x00000484
#define MSR_IA32_VMX_MISC 0x00000485
#define MSR_IA32_VMX_CR0_FIXED0 0x00000486
#define MSR_IA32_VMX_CR0_FIXED1 0x00000487
#define MSR_IA32_VMX_CR4_FIXED0 0x00000488
#define MSR_IA32_VMX_CR4_FIXED1 0x00000489
#define MSR_IA32_VMX_VMCS_ENUM 0x0000048a
#define MSR_IA32_VMX_PROCBASED_CTLS2 0x0000048b
#define MSR_IA32_VMX_EPT_VPID_CAP 0x0000048c
#define MSR_IA32_VMX_TRUE_PINBASED_CTLS 0x0000048d
#define MSR_IA32_VMX_TRUE_PROCBASED_CTLS 0x0000048e
#define MSR_IA32_VMX_TRUE_EXIT_CTLS 0x0000048f
#define MSR_IA32_VMX_TRUE_ENTRY_CTLS 0x00000490
#define MSR_IA32_VMX_VMFUNC 0x00000491
#define XSTATE_FP_BIT 0
#define XSTATE_SSE_BIT 1
#define XSTATE_YMM_BIT 2
@ -752,6 +771,117 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS];
#define MSR_CORE_CAP_SPLIT_LOCK_DETECT (1U << 5)
/* VMX MSR features */
#define MSR_VMX_BASIC_VMCS_REVISION_MASK 0x7FFFFFFFull
#define MSR_VMX_BASIC_VMXON_REGION_SIZE_MASK (0x00001FFFull << 32)
#define MSR_VMX_BASIC_VMCS_MEM_TYPE_MASK (0x003C0000ull << 32)
#define MSR_VMX_BASIC_DUAL_MONITOR (1ULL << 49)
#define MSR_VMX_BASIC_INS_OUTS (1ULL << 54)
#define MSR_VMX_BASIC_TRUE_CTLS (1ULL << 55)
#define MSR_VMX_MISC_PREEMPTION_TIMER_SHIFT_MASK 0x1Full
#define MSR_VMX_MISC_STORE_LMA (1ULL << 5)
#define MSR_VMX_MISC_ACTIVITY_HLT (1ULL << 6)
#define MSR_VMX_MISC_ACTIVITY_SHUTDOWN (1ULL << 7)
#define MSR_VMX_MISC_ACTIVITY_WAIT_SIPI (1ULL << 8)
#define MSR_VMX_MISC_MAX_MSR_LIST_SIZE_MASK 0x0E000000ull
#define MSR_VMX_MISC_VMWRITE_VMEXIT (1ULL << 29)
#define MSR_VMX_MISC_ZERO_LEN_INJECT (1ULL << 30)
#define MSR_VMX_EPT_EXECONLY (1ULL << 0)
#define MSR_VMX_EPT_PAGE_WALK_LENGTH_4 (1ULL << 6)
#define MSR_VMX_EPT_PAGE_WALK_LENGTH_5 (1ULL << 7)
#define MSR_VMX_EPT_UC (1ULL << 8)
#define MSR_VMX_EPT_WB (1ULL << 14)
#define MSR_VMX_EPT_2MB (1ULL << 16)
#define MSR_VMX_EPT_1GB (1ULL << 17)
#define MSR_VMX_EPT_INVEPT (1ULL << 20)
#define MSR_VMX_EPT_AD_BITS (1ULL << 21)
#define MSR_VMX_EPT_ADVANCED_VMEXIT_INFO (1ULL << 22)
#define MSR_VMX_EPT_INVEPT_SINGLE_CONTEXT (1ULL << 25)
#define MSR_VMX_EPT_INVEPT_ALL_CONTEXT (1ULL << 26)
#define MSR_VMX_EPT_INVVPID (1ULL << 32)
#define MSR_VMX_EPT_INVVPID_SINGLE_ADDR (1ULL << 40)
#define MSR_VMX_EPT_INVVPID_SINGLE_CONTEXT (1ULL << 41)
#define MSR_VMX_EPT_INVVPID_ALL_CONTEXT (1ULL << 42)
#define MSR_VMX_EPT_INVVPID_SINGLE_CONTEXT_NOGLOBALS (1ULL << 43)
#define MSR_VMX_VMFUNC_EPT_SWITCHING (1ULL << 0)
/* VMX controls */
#define VMX_CPU_BASED_VIRTUAL_INTR_PENDING 0x00000004
#define VMX_CPU_BASED_USE_TSC_OFFSETING 0x00000008
#define VMX_CPU_BASED_HLT_EXITING 0x00000080
#define VMX_CPU_BASED_INVLPG_EXITING 0x00000200
#define VMX_CPU_BASED_MWAIT_EXITING 0x00000400
#define VMX_CPU_BASED_RDPMC_EXITING 0x00000800
#define VMX_CPU_BASED_RDTSC_EXITING 0x00001000
#define VMX_CPU_BASED_CR3_LOAD_EXITING 0x00008000
#define VMX_CPU_BASED_CR3_STORE_EXITING 0x00010000
#define VMX_CPU_BASED_CR8_LOAD_EXITING 0x00080000
#define VMX_CPU_BASED_CR8_STORE_EXITING 0x00100000
#define VMX_CPU_BASED_TPR_SHADOW 0x00200000
#define VMX_CPU_BASED_VIRTUAL_NMI_PENDING 0x00400000
#define VMX_CPU_BASED_MOV_DR_EXITING 0x00800000
#define VMX_CPU_BASED_UNCOND_IO_EXITING 0x01000000
#define VMX_CPU_BASED_USE_IO_BITMAPS 0x02000000
#define VMX_CPU_BASED_MONITOR_TRAP_FLAG 0x08000000
#define VMX_CPU_BASED_USE_MSR_BITMAPS 0x10000000
#define VMX_CPU_BASED_MONITOR_EXITING 0x20000000
#define VMX_CPU_BASED_PAUSE_EXITING 0x40000000
#define VMX_CPU_BASED_ACTIVATE_SECONDARY_CONTROLS 0x80000000
#define VMX_SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES 0x00000001
#define VMX_SECONDARY_EXEC_ENABLE_EPT 0x00000002
#define VMX_SECONDARY_EXEC_DESC 0x00000004
#define VMX_SECONDARY_EXEC_RDTSCP 0x00000008
#define VMX_SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE 0x00000010
#define VMX_SECONDARY_EXEC_ENABLE_VPID 0x00000020
#define VMX_SECONDARY_EXEC_WBINVD_EXITING 0x00000040
#define VMX_SECONDARY_EXEC_UNRESTRICTED_GUEST 0x00000080
#define VMX_SECONDARY_EXEC_APIC_REGISTER_VIRT 0x00000100
#define VMX_SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY 0x00000200
#define VMX_SECONDARY_EXEC_PAUSE_LOOP_EXITING 0x00000400
#define VMX_SECONDARY_EXEC_RDRAND_EXITING 0x00000800
#define VMX_SECONDARY_EXEC_ENABLE_INVPCID 0x00001000
#define VMX_SECONDARY_EXEC_ENABLE_VMFUNC 0x00002000
#define VMX_SECONDARY_EXEC_SHADOW_VMCS 0x00004000
#define VMX_SECONDARY_EXEC_ENCLS_EXITING 0x00008000
#define VMX_SECONDARY_EXEC_RDSEED_EXITING 0x00010000
#define VMX_SECONDARY_EXEC_ENABLE_PML 0x00020000
#define VMX_SECONDARY_EXEC_XSAVES 0x00100000
#define VMX_PIN_BASED_EXT_INTR_MASK 0x00000001
#define VMX_PIN_BASED_NMI_EXITING 0x00000008
#define VMX_PIN_BASED_VIRTUAL_NMIS 0x00000020
#define VMX_PIN_BASED_VMX_PREEMPTION_TIMER 0x00000040
#define VMX_PIN_BASED_POSTED_INTR 0x00000080
#define VMX_VM_EXIT_SAVE_DEBUG_CONTROLS 0x00000004
#define VMX_VM_EXIT_HOST_ADDR_SPACE_SIZE 0x00000200
#define VMX_VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL 0x00001000
#define VMX_VM_EXIT_ACK_INTR_ON_EXIT 0x00008000
#define VMX_VM_EXIT_SAVE_IA32_PAT 0x00040000
#define VMX_VM_EXIT_LOAD_IA32_PAT 0x00080000
#define VMX_VM_EXIT_SAVE_IA32_EFER 0x00100000
#define VMX_VM_EXIT_LOAD_IA32_EFER 0x00200000
#define VMX_VM_EXIT_SAVE_VMX_PREEMPTION_TIMER 0x00400000
#define VMX_VM_EXIT_CLEAR_BNDCFGS 0x00800000
#define VMX_VM_EXIT_PT_CONCEAL_PIP 0x01000000
#define VMX_VM_EXIT_CLEAR_IA32_RTIT_CTL 0x02000000
#define VMX_VM_ENTRY_LOAD_DEBUG_CONTROLS 0x00000004
#define VMX_VM_ENTRY_IA32E_MODE 0x00000200
#define VMX_VM_ENTRY_SMM 0x00000400
#define VMX_VM_ENTRY_DEACT_DUAL_MONITOR 0x00000800
#define VMX_VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL 0x00002000
#define VMX_VM_ENTRY_LOAD_IA32_PAT 0x00004000
#define VMX_VM_ENTRY_LOAD_IA32_EFER 0x00008000
#define VMX_VM_ENTRY_LOAD_BNDCFGS 0x00010000
#define VMX_VM_ENTRY_PT_CONCEAL_PIP 0x00020000
#define VMX_VM_ENTRY_LOAD_IA32_RTIT_CTL 0x00040000
/* Supported Hyper-V Enlightenments */
#define HYPERV_FEAT_RELAXED 0
#define HYPERV_FEAT_VAPIC 1