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hw/arm: Remove 'mainstone' machine

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The 'mainstone' machine has been deprecated since 9.0, and
so we can remove it for the 9.2 release.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20240903160751.4100218-11-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2024-09-03 17:07:08 +01:00
parent a2ccff4d2b
commit 6e5a2d7714
7 changed files with 0 additions and 213 deletions
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2
MAINTAINERS
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@ -917,7 +917,6 @@ PXA2XX
M: Peter Maydell <peter.maydell@linaro.org>
L: qemu-arm@nongnu.org
S: Odd Fixes
F: hw/arm/mainstone.c
F: hw/arm/z2.c
F: hw/*/pxa2xx*
F: hw/gpio/max7310.c
@ -925,7 +924,6 @@ F: hw/misc/mst_fpga.c
F: hw/adc/max111x.c
F: include/hw/adc/max111x.h
F: include/hw/arm/pxa.h
F: docs/system/arm/mainstone.rst
SABRELITE / i.MX6
M: Peter Maydell <peter.maydell@linaro.org>

1
configs/devices/arm-softmmu/default.mak
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@ -27,7 +27,6 @@
# CONFIG_VERSATILE=n
# CONFIG_VEXPRESS=n
# CONFIG_ZYNQ=n
# CONFIG_MAINSTONE=n
# CONFIG_Z2=n
# CONFIG_NPCM7XX=n
# CONFIG_COLLIE=n

25
docs/system/arm/mainstone.rst
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@ -1,25 +0,0 @@
Intel Mainstone II board (``mainstone``)
========================================
The ``mainstone`` board emulates the Intel Mainstone II development
board, which uses a PXA270 CPU.
Emulated devices:
- Flash memory
- Keypad
- MMC controller
- 91C111 ethernet
- PIC
- Timer
- DMA
- GPIO
- FIR
- Serial
- LCD controller
- SSP
- USB controller
- RTC
- PCMCIA
- I2C
- I2S

1
docs/system/target-arm.rst
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@ -91,7 +91,6 @@ undocumented; you can get a complete list by running
arm/cubieboard
arm/emcraft-sf2
arm/musicpal
arm/mainstone
arm/kzm
arm/nseries
arm/nrf

8
hw/arm/Kconfig
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@ -94,14 +94,6 @@ config INTEGRATOR
select PL181 # display
select SMC91C111
config MAINSTONE
bool
default y
depends on TCG && ARM
select PXA2XX
select PFLASH_CFI01
select SMC91C111
config MPS3R
bool
default y

175
hw/arm/mainstone.c
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@ -1,175 +0,0 @@
/*
* PXA270-based Intel Mainstone platforms.
*
* Copyright (c) 2007 by Armin Kuster <akuster@kama-aina.net> or
* <akuster@mvista.com>
*
* Code based on spitz platform by Andrzej Zaborowski <balrog@zabor.org>
*
* This code is licensed under the GNU GPL v2.
*
* Contributions after 2012-01-13 are licensed under the terms of the
* GNU GPL, version 2 or (at your option) any later version.
*/
#include "qemu/osdep.h"
#include "qemu/units.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
#include "hw/arm/pxa.h"
#include "hw/arm/boot.h"
#include "net/net.h"
#include "hw/net/smc91c111.h"
#include "hw/boards.h"
#include "hw/block/flash.h"
#include "hw/sysbus.h"
#include "exec/address-spaces.h"
/* Device addresses */
#define MST_FPGA_PHYS 0x08000000
#define MST_ETH_PHYS 0x10000300
#define MST_FLASH_0 0x00000000
#define MST_FLASH_1 0x04000000
/* IRQ definitions */
#define MMC_IRQ 0
#define USIM_IRQ 1
#define USBC_IRQ 2
#define ETHERNET_IRQ 3
#define AC97_IRQ 4
#define PEN_IRQ 5
#define MSINS_IRQ 6
#define EXBRD_IRQ 7
#define S0_CD_IRQ 9
#define S0_STSCHG_IRQ 10
#define S0_IRQ 11
#define S1_CD_IRQ 13
#define S1_STSCHG_IRQ 14
#define S1_IRQ 15
static const struct keymap map[0xE0] = {
[0 ... 0xDF] = { -1, -1 },
[0x1e] = {0,0}, /* a */
[0x30] = {0,1}, /* b */
[0x2e] = {0,2}, /* c */
[0x20] = {0,3}, /* d */
[0x12] = {0,4}, /* e */
[0x21] = {0,5}, /* f */
[0x22] = {1,0}, /* g */
[0x23] = {1,1}, /* h */
[0x17] = {1,2}, /* i */
[0x24] = {1,3}, /* j */
[0x25] = {1,4}, /* k */
[0x26] = {1,5}, /* l */
[0x32] = {2,0}, /* m */
[0x31] = {2,1}, /* n */
[0x18] = {2,2}, /* o */
[0x19] = {2,3}, /* p */
[0x10] = {2,4}, /* q */
[0x13] = {2,5}, /* r */
[0x1f] = {3,0}, /* s */
[0x14] = {3,1}, /* t */
[0x16] = {3,2}, /* u */
[0x2f] = {3,3}, /* v */
[0x11] = {3,4}, /* w */
[0x2d] = {3,5}, /* x */
[0x34] = {4,0}, /* . */
[0x15] = {4,2}, /* y */
[0x2c] = {4,3}, /* z */
[0x35] = {4,4}, /* / */
[0xc7] = {5,0}, /* Home */
[0x2a] = {5,1}, /* shift */
/*
* There are two matrix positions which map to space,
* but QEMU can only use one of them for the reverse
* mapping, so simply use the second one.
*/
/* [0x39] = {5,2}, space */
[0x39] = {5,3}, /* space */
/*
* Matrix position {5,4} and other keys are missing here.
* TODO: Compare with Linux code and test real hardware.
*/
[0x1c] = {5,4}, /* enter */
[0x0e] = {5,5}, /* backspace */
[0xc8] = {6,0}, /* up */
[0xd0] = {6,1}, /* down */
[0xcb] = {6,2}, /* left */
[0xcd] = {6,3}, /* right */
};
enum mainstone_model_e { mainstone };
#define MAINSTONE_RAM_SIZE (64 * MiB)
#define MAINSTONE_ROM_SIZE (8 * MiB)
#define MAINSTONE_FLASH_SIZE (32 * MiB)
static struct arm_boot_info mainstone_binfo = {
.loader_start = PXA2XX_SDRAM_BASE,
.ram_size = MAINSTONE_RAM_SIZE,
};
#define FLASH_SECTOR_SIZE (256 * KiB)
static void mainstone_common_init(MachineState *machine,
enum mainstone_model_e model, int arm_id)
{
hwaddr mainstone_flash_base[] = { MST_FLASH_0, MST_FLASH_1 };
PXA2xxState *mpu;
DeviceState *mst_irq;
DriveInfo *dinfo;
int i;
MemoryRegion *rom = g_new(MemoryRegion, 1);
/* Setup CPU & memory */
mpu = pxa270_init(mainstone_binfo.ram_size, machine->cpu_type);
memory_region_init_rom(rom, NULL, "mainstone.rom", MAINSTONE_ROM_SIZE,
&error_fatal);
memory_region_add_subregion(get_system_memory(), 0x00000000, rom);
/* There are two 32MiB flash devices on the board */
for (i = 0; i < 2; i ++) {
dinfo = drive_get(IF_PFLASH, 0, i);
pflash_cfi01_register(mainstone_flash_base[i],
i ? "mainstone.flash1" : "mainstone.flash0",
MAINSTONE_FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
FLASH_SECTOR_SIZE, 4, 0, 0, 0, 0, 0);
}
mst_irq = sysbus_create_simple("mainstone-fpga", MST_FPGA_PHYS,
qdev_get_gpio_in(mpu->gpio, 0));
/* setup keypad */
pxa27x_register_keypad(mpu->kp, map, 0xe0);
/* MMC/SD host */
pxa2xx_mmci_handlers(mpu->mmc, NULL, qdev_get_gpio_in(mst_irq, MMC_IRQ));
pxa2xx_pcmcia_set_irq_cb(mpu->pcmcia[0],
qdev_get_gpio_in(mst_irq, S0_IRQ),
qdev_get_gpio_in(mst_irq, S0_CD_IRQ));
pxa2xx_pcmcia_set_irq_cb(mpu->pcmcia[1],
qdev_get_gpio_in(mst_irq, S1_IRQ),
qdev_get_gpio_in(mst_irq, S1_CD_IRQ));
smc91c111_init(MST_ETH_PHYS, qdev_get_gpio_in(mst_irq, ETHERNET_IRQ));
mainstone_binfo.board_id = arm_id;
arm_load_kernel(mpu->cpu, machine, &mainstone_binfo);
}
static void mainstone_init(MachineState *machine)
{
mainstone_common_init(machine, mainstone, 0x196);
}
static void mainstone2_machine_init(MachineClass *mc)
{
mc->desc = "Mainstone II (PXA27x)";
mc->init = mainstone_init;
mc->ignore_memory_transaction_failures = true;
mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c5");
mc->deprecation_reason = "machine is old and unmaintained";
}
DEFINE_MACHINE("mainstone", mainstone2_machine_init)

1
hw/arm/meson.build
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@ -6,7 +6,6 @@ arm_ss.add(when: 'CONFIG_DIGIC', if_true: files('digic_boards.c'))
arm_ss.add(when: 'CONFIG_EMCRAFT_SF2', if_true: files('msf2-som.c'))
arm_ss.add(when: 'CONFIG_HIGHBANK', if_true: files('highbank.c'))
arm_ss.add(when: 'CONFIG_INTEGRATOR', if_true: files('integratorcp.c'))
arm_ss.add(when: 'CONFIG_MAINSTONE', if_true: files('mainstone.c'))
arm_ss.add(when: 'CONFIG_MICROBIT', if_true: files('microbit.c'))
arm_ss.add(when: 'CONFIG_MPS3R', if_true: files('mps3r.c'))
arm_ss.add(when: 'CONFIG_MUSICPAL', if_true: files('musicpal.c'))