hw/m68k: add VIA support
Inside the 680x0 Macintosh, VIA (Versatile Interface Adapter) is used to interface the keyboard, Mouse, and real-time clock. It also provides control line for the floppy disk driver, video interface, sound circuitry and serial interface. This implementation is based on the MOS6522 object. Co-developed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Hervé Poussineau <hpoussin@reactos.org> Message-Id: <20191026164546.30020-6-laurent@vivier.eu>
This commit is contained in:
Laurent Vivier
parent
be92084198
commit
6dca62a000
@ -917,6 +917,12 @@ F: hw/m68k/next-*.c
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F: hw/display/next-fb.c
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F: hw/display/next-fb.c
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F: include/hw/m68k/next-cube.h
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F: include/hw/m68k/next-cube.h
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q800
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M: Laurent Vivier <laurent@vivier.eu>
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S: Maintained
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F: hw/misc/mac_via.c
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F: include/hw/misc/mac_via.h
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MicroBlaze Machines
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MicroBlaze Machines
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-------------------
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-------------------
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petalogix_s3adsp1800
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petalogix_s3adsp1800
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@ -7,3 +7,4 @@ CONFIG_SEMIHOSTING=y
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CONFIG_AN5206=y
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CONFIG_AN5206=y
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CONFIG_MCF5208=y
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CONFIG_MCF5208=y
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CONFIG_NEXTCUBE=y
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CONFIG_NEXTCUBE=y
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CONFIG_Q800=y
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@ -12,3 +12,7 @@ config NEXTCUBE
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bool
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bool
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select FRAMEBUFFER
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select FRAMEBUFFER
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select ESCC
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select ESCC
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config Q800
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bool
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select MAC_VIA
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@ -120,4 +120,8 @@ config AUX
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config UNIMP
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config UNIMP
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bool
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bool
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config MAC_VIA
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bool
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select MOS6522
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source macio/Kconfig
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source macio/Kconfig
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@ -79,5 +79,6 @@ common-obj-$(CONFIG_ASPEED_SOC) += aspeed_xdma.o
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common-obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o
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common-obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o
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common-obj-$(CONFIG_MSF2) += msf2-sysreg.o
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common-obj-$(CONFIG_MSF2) += msf2-sysreg.o
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common-obj-$(CONFIG_NRF51_SOC) += nrf51_rng.o
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common-obj-$(CONFIG_NRF51_SOC) += nrf51_rng.o
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obj-$(CONFIG_MAC_VIA) += mac_via.o
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common-obj-$(CONFIG_GRLIB) += grlib_ahb_apb_pnp.o
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common-obj-$(CONFIG_GRLIB) += grlib_ahb_apb_pnp.o
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767
hw/misc/mac_via.c
Normal file
767
hw/misc/mac_via.c
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@ -0,0 +1,767 @@
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/*
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* QEMU m68k Macintosh VIA device support
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*
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* Copyright (c) 2011-2018 Laurent Vivier
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* Copyright (c) 2018 Mark Cave-Ayland
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*
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* Some parts from hw/misc/macio/cuda.c
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*
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* Copyright (c) 2004-2007 Fabrice Bellard
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* Copyright (c) 2007 Jocelyn Mayer
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*
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* some parts from linux-2.6.29, arch/m68k/include/asm/mac_via.h
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "qemu-common.h"
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#include "migration/vmstate.h"
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#include "hw/sysbus.h"
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#include "hw/irq.h"
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#include "qemu/timer.h"
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#include "hw/misc/mac_via.h"
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#include "hw/misc/mos6522.h"
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#include "hw/input/adb.h"
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#include "sysemu/runstate.h"
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#include "qapi/error.h"
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#include "qemu/cutils.h"
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/*
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* VIAs: There are two in every machine,
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*/
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#define VIA_SIZE (0x2000)
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/*
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* Not all of these are true post MacII I think.
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* CSA: probably the ones CHRP marks as 'unused' change purposes
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* when the IWM becomes the SWIM.
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* http://www.rs6000.ibm.com/resource/technology/chrpio/via5.mak.html
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* ftp://ftp.austin.ibm.com/pub/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf
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*
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* also, http://developer.apple.com/technotes/hw/hw_09.html claims the
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* following changes for IIfx:
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* VIA1A_vSccWrReq not available and that VIA1A_vSync has moved to an IOP.
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* Also, "All of the functionality of VIA2 has been moved to other chips".
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*/
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#define VIA1A_vSccWrReq 0x80 /*
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* SCC write. (input)
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* [CHRP] SCC WREQ: Reflects the state of the
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* Wait/Request pins from the SCC.
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* [Macintosh Family Hardware]
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* as CHRP on SE/30,II,IIx,IIcx,IIci.
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* on IIfx, "0 means an active request"
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*/
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#define VIA1A_vRev8 0x40 /*
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* Revision 8 board ???
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* [CHRP] En WaitReqB: Lets the WaitReq_L
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* signal from port B of the SCC appear on
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* the PA7 input pin. Output.
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* [Macintosh Family] On the SE/30, this
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* is the bit to flip screen buffers.
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* 0=alternate, 1=main.
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* on II,IIx,IIcx,IIci,IIfx this is a bit
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* for Rev ID. 0=II,IIx, 1=IIcx,IIci,IIfx
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*/
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#define VIA1A_vHeadSel 0x20 /*
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* Head select for IWM.
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* [CHRP] unused.
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* [Macintosh Family] "Floppy disk
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* state-control line SEL" on all but IIfx
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*/
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#define VIA1A_vOverlay 0x10 /*
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* [Macintosh Family] On SE/30,II,IIx,IIcx
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* this bit enables the "Overlay" address
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* map in the address decoders as it is on
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* reset for mapping the ROM over the reset
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* vector. 1=use overlay map.
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* On the IIci,IIfx it is another bit of the
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* CPU ID: 0=normal IIci, 1=IIci with parity
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* feature or IIfx.
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* [CHRP] En WaitReqA: Lets the WaitReq_L
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* signal from port A of the SCC appear
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* on the PA7 input pin (CHRP). Output.
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* [MkLinux] "Drive Select"
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* (with 0x20 being 'disk head select')
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*/
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#define VIA1A_vSync 0x08 /*
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* [CHRP] Sync Modem: modem clock select:
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* 1: select the external serial clock to
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* drive the SCC's /RTxCA pin.
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* 0: Select the 3.6864MHz clock to drive
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* the SCC cell.
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* [Macintosh Family] Correct on all but IIfx
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*/
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/*
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* Macintosh Family Hardware sez: bits 0-2 of VIA1A are volume control
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* on Macs which had the PWM sound hardware. Reserved on newer models.
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* On IIci,IIfx, bits 1-2 are the rest of the CPU ID:
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* bit 2: 1=IIci, 0=IIfx
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* bit 1: 1 on both IIci and IIfx.
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* MkLinux sez bit 0 is 'burnin flag' in this case.
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* CHRP sez: VIA1A bits 0-2 and 5 are 'unused': if programmed as
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* inputs, these bits will read 0.
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*/
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#define VIA1A_vVolume 0x07 /* Audio volume mask for PWM */
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#define VIA1A_CPUID0 0x02 /* CPU id bit 0 on RBV, others */
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#define VIA1A_CPUID1 0x04 /* CPU id bit 0 on RBV, others */
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#define VIA1A_CPUID2 0x10 /* CPU id bit 0 on RBV, others */
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#define VIA1A_CPUID3 0x40 /* CPU id bit 0 on RBV, others */
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/*
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* Info on VIA1B is from Macintosh Family Hardware & MkLinux.
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* CHRP offers no info.
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*/
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#define VIA1B_vSound 0x80 /*
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* Sound enable (for compatibility with
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* PWM hardware) 0=enabled.
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* Also, on IIci w/parity, shows parity error
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* 0=error, 1=OK.
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*/
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#define VIA1B_vMystery 0x40 /*
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* On IIci, parity enable. 0=enabled,1=disabled
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* On SE/30, vertical sync interrupt enable.
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* 0=enabled. This vSync interrupt shows up
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* as a slot $E interrupt.
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*/
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#define VIA1B_vADBS2 0x20 /* ADB state input bit 1 (unused on IIfx) */
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#define VIA1B_vADBS1 0x10 /* ADB state input bit 0 (unused on IIfx) */
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#define VIA1B_vADBInt 0x08 /* ADB interrupt 0=interrupt (unused on IIfx)*/
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#define VIA1B_vRTCEnb 0x04 /* Enable Real time clock. 0=enabled. */
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#define VIA1B_vRTCClk 0x02 /* Real time clock serial-clock line. */
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#define VIA1B_vRTCData 0x01 /* Real time clock serial-data line. */
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/*
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* VIA2 A register is the interrupt lines raised off the nubus
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* slots.
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* The below info is from 'Macintosh Family Hardware.'
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* MkLinux calls the 'IIci internal video IRQ' below the 'RBV slot 0 irq.'
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* It also notes that the slot $9 IRQ is the 'Ethernet IRQ' and
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* defines the 'Video IRQ' as 0x40 for the 'EVR' VIA work-alike.
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* Perhaps OSS uses vRAM1 and vRAM2 for ADB.
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*/
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#define VIA2A_vRAM1 0x80 /* RAM size bit 1 (IIci: reserved) */
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#define VIA2A_vRAM0 0x40 /* RAM size bit 0 (IIci: internal video IRQ) */
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#define VIA2A_vIRQE 0x20 /* IRQ from slot $E */
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#define VIA2A_vIRQD 0x10 /* IRQ from slot $D */
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#define VIA2A_vIRQC 0x08 /* IRQ from slot $C */
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#define VIA2A_vIRQB 0x04 /* IRQ from slot $B */
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#define VIA2A_vIRQA 0x02 /* IRQ from slot $A */
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#define VIA2A_vIRQ9 0x01 /* IRQ from slot $9 */
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/*
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* RAM size bits decoded as follows:
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* bit1 bit0 size of ICs in bank A
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* 0 0 256 kbit
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* 0 1 1 Mbit
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* 1 0 4 Mbit
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* 1 1 16 Mbit
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*/
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/*
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* Register B has the fun stuff in it
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*/
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#define VIA2B_vVBL 0x80 /*
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* VBL output to VIA1 (60.15Hz) driven by
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* timer T1.
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* on IIci, parity test: 0=test mode.
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* [MkLinux] RBV_PARODD: 1=odd,0=even.
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*/
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#define VIA2B_vSndJck 0x40 /*
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* External sound jack status.
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* 0=plug is inserted. On SE/30, always 0
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*/
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#define VIA2B_vTfr0 0x20 /* Transfer mode bit 0 ack from NuBus */
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#define VIA2B_vTfr1 0x10 /* Transfer mode bit 1 ack from NuBus */
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#define VIA2B_vMode32 0x08 /*
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* 24/32bit switch - doubles as cache flush
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* on II, AMU/PMMU control.
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* if AMU, 0=24bit to 32bit translation
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* if PMMU, 1=PMMU is accessing page table.
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* on SE/30 tied low.
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* on IIx,IIcx,IIfx, unused.
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* on IIci/RBV, cache control. 0=flush cache.
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*/
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#define VIA2B_vPower 0x04 /*
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* Power off, 0=shut off power.
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* on SE/30 this signal sent to PDS card.
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*/
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#define VIA2B_vBusLk 0x02 /*
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* Lock NuBus transactions, 0=locked.
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* on SE/30 sent to PDS card.
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*/
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#define VIA2B_vCDis 0x01 /*
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* Cache control. On IIci, 1=disable cache card
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* on others, 0=disable processor's instruction
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* and data caches.
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*/
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/* interrupt flags */
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#define IRQ_SET 0x80
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/* common */
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#define VIA_IRQ_TIMER1 0x40
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#define VIA_IRQ_TIMER2 0x20
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/*
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* Apple sez: http://developer.apple.com/technotes/ov/ov_04.html
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* Another example of a valid function that has no ROM support is the use
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* of the alternate video page for page-flipping animation. Since there
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* is no ROM call to flip pages, it is necessary to go play with the
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* right bit in the VIA chip (6522 Versatile Interface Adapter).
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* [CSA: don't know which one this is, but it's one of 'em!]
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*/
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/*
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* 6522 registers - see databook.
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* CSA: Assignments for VIA1 confirmed from CHRP spec.
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*/
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/* partial address decode. 0xYYXX : XX part for RBV, YY part for VIA */
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/* Note: 15 VIA regs, 8 RBV regs */
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#define vBufB 0x0000 /* [VIA/RBV] Register B */
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#define vBufAH 0x0200 /* [VIA only] Buffer A, with handshake. DON'T USE! */
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#define vDirB 0x0400 /* [VIA only] Data Direction Register B. */
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#define vDirA 0x0600 /* [VIA only] Data Direction Register A. */
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#define vT1CL 0x0800 /* [VIA only] Timer one counter low. */
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#define vT1CH 0x0a00 /* [VIA only] Timer one counter high. */
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#define vT1LL 0x0c00 /* [VIA only] Timer one latches low. */
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#define vT1LH 0x0e00 /* [VIA only] Timer one latches high. */
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#define vT2CL 0x1000 /* [VIA only] Timer two counter low. */
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#define vT2CH 0x1200 /* [VIA only] Timer two counter high. */
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#define vSR 0x1400 /* [VIA only] Shift register. */
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#define vACR 0x1600 /* [VIA only] Auxilary control register. */
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#define vPCR 0x1800 /* [VIA only] Peripheral control register. */
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/*
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* CHRP sez never ever to *write* this.
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* Mac family says never to *change* this.
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* In fact we need to initialize it once at start.
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*/
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#define vIFR 0x1a00 /* [VIA/RBV] Interrupt flag register. */
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#define vIER 0x1c00 /* [VIA/RBV] Interrupt enable register. */
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#define vBufA 0x1e00 /* [VIA/RBV] register A (no handshake) */
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/* from linux 2.6 drivers/macintosh/via-macii.c */
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/* Bits in ACR */
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#define VIA1ACR_vShiftCtrl 0x1c /* Shift register control bits */
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#define VIA1ACR_vShiftExtClk 0x0c /* Shift on external clock */
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#define VIA1ACR_vShiftOut 0x10 /* Shift out if 1 */
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/*
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* Apple Macintosh Family Hardware Refenece
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* Table 19-10 ADB transaction states
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*/
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#define VIA1B_vADB_StateMask (VIA1B_vADBS1 | VIA1B_vADBS2)
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#define VIA1B_vADB_StateShift 4
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#define VIA_TIMER_FREQ (783360)
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/* VIA returns time offset from Jan 1, 1904, not 1970 */
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#define RTC_OFFSET 2082844800
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static void via1_VBL_update(MOS6522Q800VIA1State *v1s)
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{
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MOS6522State *s = MOS6522(v1s);
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/* 60 Hz irq */
|
||||||
|
v1s->next_VBL = (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 16630) /
|
||||||
|
16630 * 16630;
|
||||||
|
|
||||||
|
if (s->ier & VIA1_IRQ_VBLANK) {
|
||||||
|
timer_mod(v1s->VBL_timer, v1s->next_VBL);
|
||||||
|
} else {
|
||||||
|
timer_del(v1s->VBL_timer);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static void via1_one_second_update(MOS6522Q800VIA1State *v1s)
|
||||||
|
{
|
||||||
|
MOS6522State *s = MOS6522(v1s);
|
||||||
|
|
||||||
|
v1s->next_second = (qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + 1000) /
|
||||||
|
1000 * 1000;
|
||||||
|
if (s->ier & VIA1_IRQ_ONE_SECOND) {
|
||||||
|
timer_mod(v1s->one_second_timer, v1s->next_second);
|
||||||
|
} else {
|
||||||
|
timer_del(v1s->one_second_timer);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static void via1_VBL(void *opaque)
|
||||||
|
{
|
||||||
|
MOS6522Q800VIA1State *v1s = opaque;
|
||||||
|
MOS6522State *s = MOS6522(v1s);
|
||||||
|
MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(s);
|
||||||
|
|
||||||
|
s->ifr |= VIA1_IRQ_VBLANK;
|
||||||
|
mdc->update_irq(s);
|
||||||
|
|
||||||
|
via1_VBL_update(v1s);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void via1_one_second(void *opaque)
|
||||||
|
{
|
||||||
|
MOS6522Q800VIA1State *v1s = opaque;
|
||||||
|
MOS6522State *s = MOS6522(v1s);
|
||||||
|
MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(s);
|
||||||
|
|
||||||
|
s->ifr |= VIA1_IRQ_ONE_SECOND;
|
||||||
|
mdc->update_irq(s);
|
||||||
|
|
||||||
|
via1_one_second_update(v1s);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void via1_irq_request(void *opaque, int irq, int level)
|
||||||
|
{
|
||||||
|
MOS6522Q800VIA1State *v1s = opaque;
|
||||||
|
MOS6522State *s = MOS6522(v1s);
|
||||||
|
MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(s);
|
||||||
|
|
||||||
|
if (level) {
|
||||||
|
s->ifr |= 1 << irq;
|
||||||
|
} else {
|
||||||
|
s->ifr &= ~(1 << irq);
|
||||||
|
}
|
||||||
|
|
||||||
|
mdc->update_irq(s);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void via2_irq_request(void *opaque, int irq, int level)
|
||||||
|
{
|
||||||
|
MOS6522Q800VIA2State *v2s = opaque;
|
||||||
|
MOS6522State *s = MOS6522(v2s);
|
||||||
|
MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(s);
|
||||||
|
|
||||||
|
if (level) {
|
||||||
|
s->ifr |= 1 << irq;
|
||||||
|
} else {
|
||||||
|
s->ifr &= ~(1 << irq);
|
||||||
|
}
|
||||||
|
|
||||||
|
mdc->update_irq(s);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void via1_rtc_update(MacVIAState *m)
|
||||||
|
{
|
||||||
|
MOS6522Q800VIA1State *v1s = &m->mos6522_via1;
|
||||||
|
MOS6522State *s = MOS6522(v1s);
|
||||||
|
|
||||||
|
if (s->b & VIA1B_vRTCEnb) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (s->dirb & VIA1B_vRTCData) {
|
||||||
|
/* send bits to the RTC */
|
||||||
|
if (!(v1s->last_b & VIA1B_vRTCClk) && (s->b & VIA1B_vRTCClk)) {
|
||||||
|
m->data_out <<= 1;
|
||||||
|
m->data_out |= s->b & VIA1B_vRTCData;
|
||||||
|
m->data_out_cnt++;
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
/* receive bits from the RTC */
|
||||||
|
if ((v1s->last_b & VIA1B_vRTCClk) &&
|
||||||
|
!(s->b & VIA1B_vRTCClk) &&
|
||||||
|
m->data_in_cnt) {
|
||||||
|
s->b = (s->b & ~VIA1B_vRTCData) |
|
||||||
|
((m->data_in >> 7) & VIA1B_vRTCData);
|
||||||
|
m->data_in <<= 1;
|
||||||
|
m->data_in_cnt--;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if (m->data_out_cnt == 8) {
|
||||||
|
m->data_out_cnt = 0;
|
||||||
|
|
||||||
|
if (m->cmd == 0) {
|
||||||
|
if (m->data_out & 0x80) {
|
||||||
|
/* this is a read command */
|
||||||
|
uint32_t time = m->tick_offset +
|
||||||
|
(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) /
|
||||||
|
NANOSECONDS_PER_SECOND);
|
||||||
|
if (m->data_out == 0x81) { /* seconds register 0 */
|
||||||
|
m->data_in = time & 0xff;
|
||||||
|
m->data_in_cnt = 8;
|
||||||
|
} else if (m->data_out == 0x85) { /* seconds register 1 */
|
||||||
|
m->data_in = (time >> 8) & 0xff;
|
||||||
|
m->data_in_cnt = 8;
|
||||||
|
} else if (m->data_out == 0x89) { /* seconds register 2 */
|
||||||
|
m->data_in = (time >> 16) & 0xff;
|
||||||
|
m->data_in_cnt = 8;
|
||||||
|
} else if (m->data_out == 0x8d) { /* seconds register 3 */
|
||||||
|
m->data_in = (time >> 24) & 0xff;
|
||||||
|
m->data_in_cnt = 8;
|
||||||
|
} else if ((m->data_out & 0xf3) == 0xa1) {
|
||||||
|
/* PRAM address 0x10 -> 0x13 */
|
||||||
|
int addr = (m->data_out >> 2) & 0x03;
|
||||||
|
m->data_in = v1s->PRAM[addr];
|
||||||
|
m->data_in_cnt = 8;
|
||||||
|
} else if ((m->data_out & 0xf3) == 0xa1) {
|
||||||
|
/* PRAM address 0x00 -> 0x0f */
|
||||||
|
int addr = (m->data_out >> 2) & 0x0f;
|
||||||
|
m->data_in = v1s->PRAM[addr];
|
||||||
|
m->data_in_cnt = 8;
|
||||||
|
} else if ((m->data_out & 0xf8) == 0xb8) {
|
||||||
|
/* extended memory designator and sector number */
|
||||||
|
m->cmd = m->data_out;
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
/* this is a write command */
|
||||||
|
m->cmd = m->data_out;
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
if (m->cmd & 0x80) {
|
||||||
|
if ((m->cmd & 0xf8) == 0xb8) {
|
||||||
|
/* extended memory designator and sector number */
|
||||||
|
int sector = m->cmd & 0x07;
|
||||||
|
int addr = (m->data_out >> 2) & 0x1f;
|
||||||
|
|
||||||
|
m->data_in = v1s->PRAM[sector * 8 + addr];
|
||||||
|
m->data_in_cnt = 8;
|
||||||
|
}
|
||||||
|
} else if (!m->wprotect) {
|
||||||
|
/* this is a write command */
|
||||||
|
if (m->alt != 0) {
|
||||||
|
/* extended memory designator and sector number */
|
||||||
|
int sector = m->cmd & 0x07;
|
||||||
|
int addr = (m->alt >> 2) & 0x1f;
|
||||||
|
|
||||||
|
v1s->PRAM[sector * 8 + addr] = m->data_out;
|
||||||
|
|
||||||
|
m->alt = 0;
|
||||||
|
} else if (m->cmd == 0x01) { /* seconds register 0 */
|
||||||
|
/* FIXME */
|
||||||
|
} else if (m->cmd == 0x05) { /* seconds register 1 */
|
||||||
|
/* FIXME */
|
||||||
|
} else if (m->cmd == 0x09) { /* seconds register 2 */
|
||||||
|
/* FIXME */
|
||||||
|
} else if (m->cmd == 0x0d) { /* seconds register 3 */
|
||||||
|
/* FIXME */
|
||||||
|
} else if (m->cmd == 0x31) {
|
||||||
|
/* Test Register */
|
||||||
|
} else if (m->cmd == 0x35) {
|
||||||
|
/* Write Protect register */
|
||||||
|
m->wprotect = m->data_out & 1;
|
||||||
|
} else if ((m->cmd & 0xf3) == 0xa1) {
|
||||||
|
/* PRAM address 0x10 -> 0x13 */
|
||||||
|
int addr = (m->cmd >> 2) & 0x03;
|
||||||
|
v1s->PRAM[addr] = m->data_out;
|
||||||
|
} else if ((m->cmd & 0xf3) == 0xa1) {
|
||||||
|
/* PRAM address 0x00 -> 0x0f */
|
||||||
|
int addr = (m->cmd >> 2) & 0x0f;
|
||||||
|
v1s->PRAM[addr] = m->data_out;
|
||||||
|
} else if ((m->cmd & 0xf8) == 0xb8) {
|
||||||
|
/* extended memory designator and sector number */
|
||||||
|
m->alt = m->cmd;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
m->data_out = 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static uint64_t mos6522_q800_via1_read(void *opaque, hwaddr addr, unsigned size)
|
||||||
|
{
|
||||||
|
MOS6522Q800VIA1State *s = MOS6522_Q800_VIA1(opaque);
|
||||||
|
MOS6522State *ms = MOS6522(s);
|
||||||
|
int64_t now = qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* If IRQs are disabled, timers are disabled, but we need to update
|
||||||
|
* VIA1_IRQ_VBLANK and VIA1_IRQ_ONE_SECOND bits in the IFR
|
||||||
|
*/
|
||||||
|
|
||||||
|
if (now >= s->next_VBL) {
|
||||||
|
ms->ifr |= VIA1_IRQ_VBLANK;
|
||||||
|
via1_VBL_update(s);
|
||||||
|
}
|
||||||
|
if (now >= s->next_second) {
|
||||||
|
ms->ifr |= VIA1_IRQ_ONE_SECOND;
|
||||||
|
via1_one_second_update(s);
|
||||||
|
}
|
||||||
|
|
||||||
|
addr = (addr >> 9) & 0xf;
|
||||||
|
return mos6522_read(ms, addr, size);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void mos6522_q800_via1_write(void *opaque, hwaddr addr, uint64_t val,
|
||||||
|
unsigned size)
|
||||||
|
{
|
||||||
|
MOS6522Q800VIA1State *v1s = MOS6522_Q800_VIA1(opaque);
|
||||||
|
MOS6522State *ms = MOS6522(v1s);
|
||||||
|
|
||||||
|
addr = (addr >> 9) & 0xf;
|
||||||
|
mos6522_write(ms, addr, val, size);
|
||||||
|
|
||||||
|
via1_one_second_update(v1s);
|
||||||
|
via1_VBL_update(v1s);
|
||||||
|
}
|
||||||
|
|
||||||
|
static const MemoryRegionOps mos6522_q800_via1_ops = {
|
||||||
|
.read = mos6522_q800_via1_read,
|
||||||
|
.write = mos6522_q800_via1_write,
|
||||||
|
.endianness = DEVICE_BIG_ENDIAN,
|
||||||
|
.valid = {
|
||||||
|
.min_access_size = 1,
|
||||||
|
.max_access_size = 1,
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
|
static uint64_t mos6522_q800_via2_read(void *opaque, hwaddr addr, unsigned size)
|
||||||
|
{
|
||||||
|
MOS6522Q800VIA2State *s = MOS6522_Q800_VIA2(opaque);
|
||||||
|
MOS6522State *ms = MOS6522(s);
|
||||||
|
|
||||||
|
addr = (addr >> 9) & 0xf;
|
||||||
|
return mos6522_read(ms, addr, size);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void mos6522_q800_via2_write(void *opaque, hwaddr addr, uint64_t val,
|
||||||
|
unsigned size)
|
||||||
|
{
|
||||||
|
MOS6522Q800VIA2State *s = MOS6522_Q800_VIA2(opaque);
|
||||||
|
MOS6522State *ms = MOS6522(s);
|
||||||
|
|
||||||
|
addr = (addr >> 9) & 0xf;
|
||||||
|
mos6522_write(ms, addr, val, size);
|
||||||
|
}
|
||||||
|
|
||||||
|
static const MemoryRegionOps mos6522_q800_via2_ops = {
|
||||||
|
.read = mos6522_q800_via2_read,
|
||||||
|
.write = mos6522_q800_via2_write,
|
||||||
|
.endianness = DEVICE_BIG_ENDIAN,
|
||||||
|
.valid = {
|
||||||
|
.min_access_size = 1,
|
||||||
|
.max_access_size = 1,
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
|
static void mac_via_reset(DeviceState *dev)
|
||||||
|
{
|
||||||
|
MacVIAState *m = MAC_VIA(dev);
|
||||||
|
MOS6522Q800VIA1State *v1s = &m->mos6522_via1;
|
||||||
|
|
||||||
|
timer_del(v1s->VBL_timer);
|
||||||
|
v1s->next_VBL = 0;
|
||||||
|
timer_del(v1s->one_second_timer);
|
||||||
|
v1s->next_second = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void mac_via_realize(DeviceState *dev, Error **errp)
|
||||||
|
{
|
||||||
|
MacVIAState *m = MAC_VIA(dev);
|
||||||
|
MOS6522State *ms;
|
||||||
|
struct tm tm;
|
||||||
|
|
||||||
|
/* Init VIAs 1 and 2 */
|
||||||
|
sysbus_init_child_obj(OBJECT(dev), "via1", &m->mos6522_via1,
|
||||||
|
sizeof(m->mos6522_via1), TYPE_MOS6522_Q800_VIA1);
|
||||||
|
|
||||||
|
sysbus_init_child_obj(OBJECT(dev), "via2", &m->mos6522_via2,
|
||||||
|
sizeof(m->mos6522_via2), TYPE_MOS6522_Q800_VIA2);
|
||||||
|
|
||||||
|
/* Pass through mos6522 output IRQs */
|
||||||
|
ms = MOS6522(&m->mos6522_via1);
|
||||||
|
object_property_add_alias(OBJECT(dev), "irq[0]", OBJECT(ms),
|
||||||
|
SYSBUS_DEVICE_GPIO_IRQ "[0]", &error_abort);
|
||||||
|
ms = MOS6522(&m->mos6522_via2);
|
||||||
|
object_property_add_alias(OBJECT(dev), "irq[1]", OBJECT(ms),
|
||||||
|
SYSBUS_DEVICE_GPIO_IRQ "[0]", &error_abort);
|
||||||
|
|
||||||
|
/* Pass through mos6522 input IRQs */
|
||||||
|
qdev_pass_gpios(DEVICE(&m->mos6522_via1), dev, "via1-irq");
|
||||||
|
qdev_pass_gpios(DEVICE(&m->mos6522_via2), dev, "via2-irq");
|
||||||
|
|
||||||
|
/* VIA 1 */
|
||||||
|
m->mos6522_via1.one_second_timer = timer_new_ms(QEMU_CLOCK_VIRTUAL,
|
||||||
|
via1_one_second,
|
||||||
|
&m->mos6522_via1);
|
||||||
|
m->mos6522_via1.VBL_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, via1_VBL,
|
||||||
|
&m->mos6522_via1);
|
||||||
|
|
||||||
|
qemu_get_timedate(&tm, 0);
|
||||||
|
m->tick_offset = (uint32_t)mktimegm(&tm) + RTC_OFFSET;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void mac_via_init(Object *obj)
|
||||||
|
{
|
||||||
|
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
|
||||||
|
MacVIAState *m = MAC_VIA(obj);
|
||||||
|
|
||||||
|
/* MMIO */
|
||||||
|
memory_region_init(&m->mmio, obj, "mac-via", 2 * VIA_SIZE);
|
||||||
|
sysbus_init_mmio(sbd, &m->mmio);
|
||||||
|
|
||||||
|
memory_region_init_io(&m->via1mem, obj, &mos6522_q800_via1_ops,
|
||||||
|
&m->mos6522_via1, "via1", VIA_SIZE);
|
||||||
|
memory_region_add_subregion(&m->mmio, 0x0, &m->via1mem);
|
||||||
|
|
||||||
|
memory_region_init_io(&m->via2mem, obj, &mos6522_q800_via2_ops,
|
||||||
|
&m->mos6522_via2, "via2", VIA_SIZE);
|
||||||
|
memory_region_add_subregion(&m->mmio, VIA_SIZE, &m->via2mem);
|
||||||
|
|
||||||
|
/* ADB */
|
||||||
|
qbus_create_inplace((BusState *)&m->adb_bus, sizeof(m->adb_bus),
|
||||||
|
TYPE_ADB_BUS, DEVICE(obj), "adb.0");
|
||||||
|
}
|
||||||
|
|
||||||
|
static const VMStateDescription vmstate_mac_via = {
|
||||||
|
.name = "mac-via",
|
||||||
|
.version_id = 1,
|
||||||
|
.minimum_version_id = 1,
|
||||||
|
.fields = (VMStateField[]) {
|
||||||
|
/* VIAs */
|
||||||
|
VMSTATE_STRUCT(mos6522_via1.parent_obj, MacVIAState, 0, vmstate_mos6522,
|
||||||
|
MOS6522State),
|
||||||
|
VMSTATE_UINT8(mos6522_via1.last_b, MacVIAState),
|
||||||
|
VMSTATE_BUFFER(mos6522_via1.PRAM, MacVIAState),
|
||||||
|
VMSTATE_TIMER_PTR(mos6522_via1.one_second_timer, MacVIAState),
|
||||||
|
VMSTATE_INT64(mos6522_via1.next_second, MacVIAState),
|
||||||
|
VMSTATE_TIMER_PTR(mos6522_via1.VBL_timer, MacVIAState),
|
||||||
|
VMSTATE_INT64(mos6522_via1.next_VBL, MacVIAState),
|
||||||
|
VMSTATE_STRUCT(mos6522_via2.parent_obj, MacVIAState, 0, vmstate_mos6522,
|
||||||
|
MOS6522State),
|
||||||
|
/* RTC */
|
||||||
|
VMSTATE_UINT32(tick_offset, MacVIAState),
|
||||||
|
VMSTATE_UINT8(data_out, MacVIAState),
|
||||||
|
VMSTATE_INT32(data_out_cnt, MacVIAState),
|
||||||
|
VMSTATE_UINT8(data_in, MacVIAState),
|
||||||
|
VMSTATE_UINT8(data_in_cnt, MacVIAState),
|
||||||
|
VMSTATE_UINT8(cmd, MacVIAState),
|
||||||
|
VMSTATE_INT32(wprotect, MacVIAState),
|
||||||
|
VMSTATE_INT32(alt, MacVIAState),
|
||||||
|
VMSTATE_END_OF_LIST()
|
||||||
|
}
|
||||||
|
};
|
||||||
|
|
||||||
|
static void mac_via_class_init(ObjectClass *oc, void *data)
|
||||||
|
{
|
||||||
|
DeviceClass *dc = DEVICE_CLASS(oc);
|
||||||
|
|
||||||
|
dc->realize = mac_via_realize;
|
||||||
|
dc->reset = mac_via_reset;
|
||||||
|
dc->vmsd = &vmstate_mac_via;
|
||||||
|
}
|
||||||
|
|
||||||
|
static TypeInfo mac_via_info = {
|
||||||
|
.name = TYPE_MAC_VIA,
|
||||||
|
.parent = TYPE_SYS_BUS_DEVICE,
|
||||||
|
.instance_size = sizeof(MacVIAState),
|
||||||
|
.instance_init = mac_via_init,
|
||||||
|
.class_init = mac_via_class_init,
|
||||||
|
};
|
||||||
|
|
||||||
|
/* VIA 1 */
|
||||||
|
static void mos6522_q800_via1_portB_write(MOS6522State *s)
|
||||||
|
{
|
||||||
|
MOS6522Q800VIA1State *v1s = container_of(s, MOS6522Q800VIA1State,
|
||||||
|
parent_obj);
|
||||||
|
MacVIAState *m = container_of(v1s, MacVIAState, mos6522_via1);
|
||||||
|
|
||||||
|
via1_rtc_update(m);
|
||||||
|
|
||||||
|
v1s->last_b = s->b;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void mos6522_q800_via1_reset(DeviceState *dev)
|
||||||
|
{
|
||||||
|
MOS6522State *ms = MOS6522(dev);
|
||||||
|
MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms);
|
||||||
|
|
||||||
|
mdc->parent_reset(dev);
|
||||||
|
|
||||||
|
ms->timers[0].frequency = VIA_TIMER_FREQ;
|
||||||
|
ms->timers[1].frequency = VIA_TIMER_FREQ;
|
||||||
|
|
||||||
|
ms->b = VIA1B_vADB_StateMask | VIA1B_vADBInt | VIA1B_vRTCEnb;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void mos6522_q800_via1_init(Object *obj)
|
||||||
|
{
|
||||||
|
qdev_init_gpio_in_named(DEVICE(obj), via1_irq_request, "via1-irq",
|
||||||
|
VIA1_IRQ_NB);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void mos6522_q800_via1_class_init(ObjectClass *oc, void *data)
|
||||||
|
{
|
||||||
|
DeviceClass *dc = DEVICE_CLASS(oc);
|
||||||
|
MOS6522DeviceClass *mdc = MOS6522_DEVICE_CLASS(oc);
|
||||||
|
|
||||||
|
dc->reset = mos6522_q800_via1_reset;
|
||||||
|
mdc->portB_write = mos6522_q800_via1_portB_write;
|
||||||
|
}
|
||||||
|
|
||||||
|
static const TypeInfo mos6522_q800_via1_type_info = {
|
||||||
|
.name = TYPE_MOS6522_Q800_VIA1,
|
||||||
|
.parent = TYPE_MOS6522,
|
||||||
|
.instance_size = sizeof(MOS6522Q800VIA1State),
|
||||||
|
.instance_init = mos6522_q800_via1_init,
|
||||||
|
.class_init = mos6522_q800_via1_class_init,
|
||||||
|
};
|
||||||
|
|
||||||
|
/* VIA 2 */
|
||||||
|
static void mos6522_q800_via2_portB_write(MOS6522State *s)
|
||||||
|
{
|
||||||
|
if (s->dirb & VIA2B_vPower && (s->b & VIA2B_vPower) == 0) {
|
||||||
|
/* shutdown */
|
||||||
|
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static void mos6522_q800_via2_reset(DeviceState *dev)
|
||||||
|
{
|
||||||
|
MOS6522State *ms = MOS6522(dev);
|
||||||
|
MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms);
|
||||||
|
|
||||||
|
mdc->parent_reset(dev);
|
||||||
|
|
||||||
|
ms->timers[0].frequency = VIA_TIMER_FREQ;
|
||||||
|
ms->timers[1].frequency = VIA_TIMER_FREQ;
|
||||||
|
|
||||||
|
ms->dirb = 0;
|
||||||
|
ms->b = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void mos6522_q800_via2_init(Object *obj)
|
||||||
|
{
|
||||||
|
qdev_init_gpio_in_named(DEVICE(obj), via2_irq_request, "via2-irq",
|
||||||
|
VIA2_IRQ_NB);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void mos6522_q800_via2_class_init(ObjectClass *oc, void *data)
|
||||||
|
{
|
||||||
|
DeviceClass *dc = DEVICE_CLASS(oc);
|
||||||
|
MOS6522DeviceClass *mdc = MOS6522_DEVICE_CLASS(oc);
|
||||||
|
|
||||||
|
dc->reset = mos6522_q800_via2_reset;
|
||||||
|
mdc->portB_write = mos6522_q800_via2_portB_write;
|
||||||
|
}
|
||||||
|
|
||||||
|
static const TypeInfo mos6522_q800_via2_type_info = {
|
||||||
|
.name = TYPE_MOS6522_Q800_VIA2,
|
||||||
|
.parent = TYPE_MOS6522,
|
||||||
|
.instance_size = sizeof(MOS6522Q800VIA2State),
|
||||||
|
.instance_init = mos6522_q800_via2_init,
|
||||||
|
.class_init = mos6522_q800_via2_class_init,
|
||||||
|
};
|
||||||
|
|
||||||
|
static void mac_via_register_types(void)
|
||||||
|
{
|
||||||
|
type_register_static(&mos6522_q800_via1_type_info);
|
||||||
|
type_register_static(&mos6522_q800_via2_type_info);
|
||||||
|
type_register_static(&mac_via_info);
|
||||||
|
}
|
||||||
|
|
||||||
|
type_init(mac_via_register_types);
|
||||||
108
include/hw/misc/mac_via.h
Normal file
108
include/hw/misc/mac_via.h
Normal file
@ -0,0 +1,108 @@
|
|||||||
|
/*
|
||||||
|
*
|
||||||
|
* Copyright (c) 2011-2018 Laurent Vivier
|
||||||
|
*
|
||||||
|
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||||
|
* See the COPYING file in the top-level directory.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef HW_MISC_MAC_VIA_H
|
||||||
|
#define HW_MISC_MAC_VIA_H
|
||||||
|
|
||||||
|
#include "exec/memory.h"
|
||||||
|
#include "hw/sysbus.h"
|
||||||
|
#include "hw/misc/mos6522.h"
|
||||||
|
|
||||||
|
|
||||||
|
/* VIA 1 */
|
||||||
|
#define VIA1_IRQ_ONE_SECOND_BIT 0
|
||||||
|
#define VIA1_IRQ_VBLANK_BIT 1
|
||||||
|
#define VIA1_IRQ_ADB_READY_BIT 2
|
||||||
|
#define VIA1_IRQ_ADB_DATA_BIT 3
|
||||||
|
#define VIA1_IRQ_ADB_CLOCK_BIT 4
|
||||||
|
|
||||||
|
#define VIA1_IRQ_NB 8
|
||||||
|
|
||||||
|
#define VIA1_IRQ_ONE_SECOND (1 << VIA1_IRQ_ONE_SECOND_BIT)
|
||||||
|
#define VIA1_IRQ_VBLANK (1 << VIA1_IRQ_VBLANK_BIT)
|
||||||
|
#define VIA1_IRQ_ADB_READY (1 << VIA1_IRQ_ADB_READY_BIT)
|
||||||
|
#define VIA1_IRQ_ADB_DATA (1 << VIA1_IRQ_ADB_DATA_BIT)
|
||||||
|
#define VIA1_IRQ_ADB_CLOCK (1 << VIA1_IRQ_ADB_CLOCK_BIT)
|
||||||
|
|
||||||
|
|
||||||
|
#define TYPE_MOS6522_Q800_VIA1 "mos6522-q800-via1"
|
||||||
|
#define MOS6522_Q800_VIA1(obj) OBJECT_CHECK(MOS6522Q800VIA1State, (obj), \
|
||||||
|
TYPE_MOS6522_Q800_VIA1)
|
||||||
|
|
||||||
|
typedef struct MOS6522Q800VIA1State {
|
||||||
|
/*< private >*/
|
||||||
|
MOS6522State parent_obj;
|
||||||
|
|
||||||
|
qemu_irq irqs[VIA1_IRQ_NB];
|
||||||
|
uint8_t last_b;
|
||||||
|
uint8_t PRAM[256];
|
||||||
|
|
||||||
|
/* external timers */
|
||||||
|
QEMUTimer *one_second_timer;
|
||||||
|
int64_t next_second;
|
||||||
|
QEMUTimer *VBL_timer;
|
||||||
|
int64_t next_VBL;
|
||||||
|
} MOS6522Q800VIA1State;
|
||||||
|
|
||||||
|
|
||||||
|
/* VIA 2 */
|
||||||
|
#define VIA2_IRQ_SCSI_DATA_BIT 0
|
||||||
|
#define VIA2_IRQ_SLOT_BIT 1
|
||||||
|
#define VIA2_IRQ_UNUSED_BIT 2
|
||||||
|
#define VIA2_IRQ_SCSI_BIT 3
|
||||||
|
#define VIA2_IRQ_ASC_BIT 4
|
||||||
|
|
||||||
|
#define VIA2_IRQ_NB 8
|
||||||
|
|
||||||
|
#define VIA2_IRQ_SCSI_DATA (1 << VIA2_IRQ_SCSI_DATA_BIT)
|
||||||
|
#define VIA2_IRQ_SLOT (1 << VIA2_IRQ_SLOT_BIT)
|
||||||
|
#define VIA2_IRQ_UNUSED (1 << VIA2_IRQ_SCSI_BIT)
|
||||||
|
#define VIA2_IRQ_SCSI (1 << VIA2_IRQ_UNUSED_BIT)
|
||||||
|
#define VIA2_IRQ_ASC (1 << VIA2_IRQ_ASC_BIT)
|
||||||
|
|
||||||
|
#define TYPE_MOS6522_Q800_VIA2 "mos6522-q800-via2"
|
||||||
|
#define MOS6522_Q800_VIA2(obj) OBJECT_CHECK(MOS6522Q800VIA2State, (obj), \
|
||||||
|
TYPE_MOS6522_Q800_VIA2)
|
||||||
|
|
||||||
|
typedef struct MOS6522Q800VIA2State {
|
||||||
|
/*< private >*/
|
||||||
|
MOS6522State parent_obj;
|
||||||
|
} MOS6522Q800VIA2State;
|
||||||
|
|
||||||
|
|
||||||
|
#define TYPE_MAC_VIA "mac_via"
|
||||||
|
#define MAC_VIA(obj) OBJECT_CHECK(MacVIAState, (obj), TYPE_MAC_VIA)
|
||||||
|
|
||||||
|
typedef struct MacVIAState {
|
||||||
|
SysBusDevice busdev;
|
||||||
|
|
||||||
|
/* MMIO */
|
||||||
|
MemoryRegion mmio;
|
||||||
|
MemoryRegion via1mem;
|
||||||
|
MemoryRegion via2mem;
|
||||||
|
|
||||||
|
/* VIAs */
|
||||||
|
MOS6522Q800VIA1State mos6522_via1;
|
||||||
|
MOS6522Q800VIA2State mos6522_via2;
|
||||||
|
|
||||||
|
/* RTC */
|
||||||
|
uint32_t tick_offset;
|
||||||
|
|
||||||
|
uint8_t data_out;
|
||||||
|
int data_out_cnt;
|
||||||
|
uint8_t data_in;
|
||||||
|
uint8_t data_in_cnt;
|
||||||
|
uint8_t cmd;
|
||||||
|
int wprotect;
|
||||||
|
int alt;
|
||||||
|
|
||||||
|
/* ADB */
|
||||||
|
ADBBusState adb_bus;
|
||||||
|
} MacVIAState;
|
||||||
|
|
||||||
|
#endif
|
||||||
Loading…
Reference in New Issue
Block a user