Implement ARM floating point exception emulation
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4166 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -378,19 +378,68 @@ void cpu_loop(CPUARMState *env)
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{
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TaskState *ts = env->opaque;
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uint32_t opcode;
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int rc;
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/* we handle the FPU emulation here, as Linux */
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/* we get the opcode */
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/* FIXME - what to do if get_user() fails? */
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get_user_u32(opcode, env->regs[15]);
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if (EmulateAll(opcode, &ts->fpa, env) == 0) {
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rc = EmulateAll(opcode, &ts->fpa, env);
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if (rc == 0) { /* illegal instruction */
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info.si_signo = SIGILL;
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info.si_errno = 0;
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info.si_code = TARGET_ILL_ILLOPN;
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info._sifields._sigfault._addr = env->regs[15];
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queue_signal(info.si_signo, &info);
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} else {
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} else if (rc < 0) { /* FP exception */
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int arm_fpe=0;
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/* translate softfloat flags to FPSR flags */
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if (-rc & float_flag_invalid)
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arm_fpe |= BIT_IOC;
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if (-rc & float_flag_divbyzero)
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arm_fpe |= BIT_DZC;
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if (-rc & float_flag_overflow)
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arm_fpe |= BIT_OFC;
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if (-rc & float_flag_underflow)
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arm_fpe |= BIT_UFC;
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if (-rc & float_flag_inexact)
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arm_fpe |= BIT_IXC;
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FPSR fpsr = ts->fpa.fpsr;
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//printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
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if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
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info.si_signo = SIGFPE;
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info.si_errno = 0;
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/* ordered by priority, least first */
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if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
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if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
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if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
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if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
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if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
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info._sifields._sigfault._addr = env->regs[15];
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queue_signal(info.si_signo, &info);
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} else {
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env->regs[15] += 4;
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}
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/* accumulate unenabled exceptions */
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if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
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fpsr |= BIT_IXC;
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if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
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fpsr |= BIT_UFC;
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if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
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fpsr |= BIT_OFC;
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if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
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fpsr |= BIT_DZC;
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if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
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fpsr |= BIT_IOC;
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ts->fpa.fpsr=fpsr;
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} else { /* everything OK */
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/* increment PC */
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env->regs[15] += 4;
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}
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@ -162,6 +162,8 @@ unsigned int EmulateAll(unsigned int opcode, FPA11* qfpa, CPUARMState* qregs)
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fpa11->initflag = 1;
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}
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set_float_exception_flags(0, &fpa11->fp_status);
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if (TEST_OPCODE(opcode,MASK_CPRT))
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{
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//fprintf(stderr,"emulating CPRT\n");
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@ -191,6 +193,11 @@ unsigned int EmulateAll(unsigned int opcode, FPA11* qfpa, CPUARMState* qregs)
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}
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// restore_flags(flags);
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if(nRc == 1 && get_float_exception_flags(&fpa11->fp_status))
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{
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//printf("fef 0x%x\n",float_exception_flags);
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nRc=-get_float_exception_flags(&fpa11->fp_status);
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}
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//printf("returning %d\n",nRc);
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return(nRc);
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