mos6522: add register names to register read/write trace events

This helps to follow how the guest is programming the mos6522 when debugging.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220305150957.5053-8-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
This commit is contained in:
Mark Cave-Ayland 2022-03-05 15:09:52 +00:00
parent c697fc80a8
commit 6c72669872
3 changed files with 14 additions and 5 deletions

View File

@ -36,6 +36,12 @@
#include "qemu/module.h"
#include "trace.h"
static const char *mos6522_reg_names[MOS6522_NUM_REGS] = {
"ORB", "ORA", "DDRB", "DDRA", "T1CL", "T1CH", "T1LL", "T1LH",
"T2CL", "T2CH", "SR", "ACR", "PCR", "IFR", "IER", "ANH"
};
/* XXX: implement all timer modes */
static void mos6522_timer1_update(MOS6522State *s, MOS6522Timer *ti,
@ -310,7 +316,7 @@ uint64_t mos6522_read(void *opaque, hwaddr addr, unsigned size)
}
if (addr != VIA_REG_IFR || val != 0) {
trace_mos6522_read(addr, val);
trace_mos6522_read(addr, mos6522_reg_names[addr], val);
}
return val;
@ -321,7 +327,7 @@ void mos6522_write(void *opaque, hwaddr addr, uint64_t val, unsigned size)
MOS6522State *s = opaque;
MOS6522DeviceClass *mdc = MOS6522_GET_CLASS(s);
trace_mos6522_write(addr, val);
trace_mos6522_write(addr, mos6522_reg_names[addr], val);
switch (addr) {
case VIA_REG_B:
@ -484,7 +490,8 @@ static void mos6522_init(Object *obj)
MOS6522State *s = MOS6522(obj);
int i;
memory_region_init_io(&s->mem, obj, &mos6522_ops, s, "mos6522", 0x10);
memory_region_init_io(&s->mem, obj, &mos6522_ops, s, "mos6522",
MOS6522_NUM_REGS);
sysbus_init_mmio(sbd, &s->mem);
sysbus_init_irq(sbd, &s->irq);

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@ -95,8 +95,8 @@ imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" PRIx64 "value 0x%08
mos6522_set_counter(int index, unsigned int val) "T%d.counter=%d"
mos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d counter=0x%"PRId64 " delta_next=0x%"PRId64
mos6522_set_sr_int(void) "set sr_int"
mos6522_write(uint64_t addr, uint64_t val) "reg=0x%"PRIx64 " val=0x%"PRIx64
mos6522_read(uint64_t addr, unsigned val) "reg=0x%"PRIx64 " val=0x%x"
mos6522_write(uint64_t addr, const char *name, uint64_t val) "reg=0x%"PRIx64 " [%s] val=0x%"PRIx64
mos6522_read(uint64_t addr, const char *name, unsigned val) "reg=0x%"PRIx64 " [%s] val=0x%x"
# npcm7xx_clk.c
npcm7xx_clk_read(uint64_t offset, uint32_t value) " offset: 0x%04" PRIx64 " value: 0x%08" PRIx32

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@ -32,6 +32,8 @@
#include "hw/input/adb.h"
#include "qom/object.h"
#define MOS6522_NUM_REGS 16
/* Bits in ACR */
#define SR_CTRL 0x1c /* Shift register control bits */
#define SR_EXT 0x0c /* Shift on external clock */