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target/xtensa: fix ps.ring use in MPU configs

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Allow ps.ring modification by wsr.ps/xsr.ps and use ps.ring value in
xtensa_get_[c]ring on configurations with MPU.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
This commit is contained in:
Max Filippov 2019-11-04 00:01:27 -08:00
parent f4d8cf148e
commit 6c438056c2
2 changed files with 9 additions and 4 deletions
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10
target/xtensa/cpu.h
View File

@ -645,7 +645,9 @@ static inline int xtensa_get_cintlevel(const CPUXtensaState *env)
static inline int xtensa_get_ring(const CPUXtensaState *env) static inline int xtensa_get_ring(const CPUXtensaState *env)
{ {
if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) { if (xtensa_option_bits_enabled(env->config,
XTENSA_OPTION_BIT(XTENSA_OPTION_MMU) |
XTENSA_OPTION_BIT(XTENSA_OPTION_MPU))) {
return (env->sregs[PS] & PS_RING) >> PS_RING_SHIFT; return (env->sregs[PS] & PS_RING) >> PS_RING_SHIFT;
} else { } else {
return 0; return 0;
@ -654,8 +656,10 @@ static inline int xtensa_get_ring(const CPUXtensaState *env)
static inline int xtensa_get_cring(const CPUXtensaState *env) static inline int xtensa_get_cring(const CPUXtensaState *env)
{ {
if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU) && if (xtensa_option_bits_enabled(env->config,
(env->sregs[PS] & PS_EXCM) == 0) { XTENSA_OPTION_BIT(XTENSA_OPTION_MMU) |
XTENSA_OPTION_BIT(XTENSA_OPTION_MPU)) &&
(env->sregs[PS] & PS_EXCM) == 0) {
return (env->sregs[PS] & PS_RING) >> PS_RING_SHIFT; return (env->sregs[PS] & PS_RING) >> PS_RING_SHIFT;
} else { } else {
return 0; return 0;

3
target/xtensa/translate.c
View File

@ -2713,7 +2713,8 @@ static void translate_wsr_ps(DisasContext *dc, const OpcodeArg arg[],
uint32_t mask = PS_WOE | PS_CALLINC | PS_OWB | uint32_t mask = PS_WOE | PS_CALLINC | PS_OWB |
PS_UM | PS_EXCM | PS_INTLEVEL; PS_UM | PS_EXCM | PS_INTLEVEL;
if (option_enabled(dc, XTENSA_OPTION_MMU)) { if (option_enabled(dc, XTENSA_OPTION_MMU) ||
option_enabled(dc, XTENSA_OPTION_MPU)) {
mask |= PS_RING; mask |= PS_RING;
} }
tcg_gen_andi_i32(cpu_SR[par[0]], arg[0].in, mask); tcg_gen_andi_i32(cpu_SR[par[0]], arg[0].in, mask);