target-arm: Infer ARMv6 feature from v6K
V6K => V6 Signed-off-by: Andreas Färber <andreas.faerber@web.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -98,7 +98,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
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env->cp15.c1_sys = 0x00050078;
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break;
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case ARM_CPUID_ARM1176:
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set_feature(env, ARM_FEATURE_V6);
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set_feature(env, ARM_FEATURE_V6K);
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set_feature(env, ARM_FEATURE_VFP);
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set_feature(env, ARM_FEATURE_AUXCR);
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@ -112,7 +111,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
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env->cp15.c1_sys = 0x00050078;
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break;
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case ARM_CPUID_ARM11MPCORE:
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set_feature(env, ARM_FEATURE_V6);
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set_feature(env, ARM_FEATURE_V6K);
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set_feature(env, ARM_FEATURE_VFP);
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set_feature(env, ARM_FEATURE_AUXCR);
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@ -125,7 +123,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
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env->cp15.c0_cachetype = 0x1dd20d2;
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break;
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case ARM_CPUID_CORTEXA8:
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set_feature(env, ARM_FEATURE_V6);
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set_feature(env, ARM_FEATURE_V6K);
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set_feature(env, ARM_FEATURE_V7);
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set_feature(env, ARM_FEATURE_AUXCR);
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@ -147,7 +144,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
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env->cp15.c1_sys = 0x00c50078;
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break;
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case ARM_CPUID_CORTEXA9:
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set_feature(env, ARM_FEATURE_V6);
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set_feature(env, ARM_FEATURE_V6K);
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set_feature(env, ARM_FEATURE_V7);
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set_feature(env, ARM_FEATURE_AUXCR);
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@ -181,7 +177,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
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set_feature(env, ARM_FEATURE_THUMB_DIV);
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break;
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case ARM_CPUID_ANY: /* For userspace emulation. */
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set_feature(env, ARM_FEATURE_V6);
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set_feature(env, ARM_FEATURE_V6K);
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set_feature(env, ARM_FEATURE_V7);
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set_feature(env, ARM_FEATURE_THUMB2);
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@ -243,6 +238,9 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
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if (arm_feature(env, ARM_FEATURE_V7)) {
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set_feature(env, ARM_FEATURE_VAPA);
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}
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if (arm_feature(env, ARM_FEATURE_V6K)) {
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set_feature(env, ARM_FEATURE_V6);
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}
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if (arm_feature(env, ARM_FEATURE_V6)) {
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set_feature(env, ARM_FEATURE_V5);
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}
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