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ppc/pnv: Change the POWER10 machine to support DD2 only

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There is no need to keep the DD1 chip model as it will never be
publicly available.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210809134547.689560-3-clg@kaod.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Cédric Le Goater 2021-08-09 15:45:23 +02:00 committed by David Gibson
parent 363fd548ab
commit 6bc8c04648
3 changed files with 3 additions and 3 deletions
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2
hw/ppc/pnv.c
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@ -1916,7 +1916,7 @@ static void pnv_machine_power10_class_init(ObjectClass *oc, void *data)
static const char compat[] = "qemu,powernv10\0ibm,powernv";
mc->desc = "IBM PowerNV (Non-Virtualized) POWER10";
mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power10_v1.0");
mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power10_v2.0");
pmc->compat = compat;
pmc->compat_size = sizeof(compat);

2
hw/ppc/pnv_core.c
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@ -347,7 +347,7 @@ static const TypeInfo pnv_core_infos[] = {
DEFINE_PNV_CORE_TYPE(power8, "power8_v2.0"),
DEFINE_PNV_CORE_TYPE(power8, "power8nvl_v1.0"),
DEFINE_PNV_CORE_TYPE(power9, "power9_v2.0"),
DEFINE_PNV_CORE_TYPE(power10, "power10_v1.0"),
DEFINE_PNV_CORE_TYPE(power10, "power10_v2.0"),
};
DEFINE_TYPES(pnv_core_infos)

2
include/hw/ppc/pnv.h
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@ -170,7 +170,7 @@ DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER8NVL,
DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER9,
TYPE_PNV_CHIP_POWER9)
#define TYPE_PNV_CHIP_POWER10 PNV_CHIP_TYPE_NAME("power10_v1.0")
#define TYPE_PNV_CHIP_POWER10 PNV_CHIP_TYPE_NAME("power10_v2.0")
DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER10,
TYPE_PNV_CHIP_POWER10)