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ppc/pegasos2: Fix reg property of 64 bit BARs in device tree

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The board firmware handles this correctly following the Open Firmware
standard which we missed. This fixes 64 bit BARs when using VOF.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-ID: <20230721221320.1311E7456AB@zero.eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
This commit is contained in:
BALATON Zoltan 2023-07-22 00:13:20 +02:00 committed by Daniel Henrique Barboza
parent 889dd6c525
commit 6b6d4c1a01
1 changed files with 5 additions and 1 deletions
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4
hw/ppc/pegasos2.c
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@ -780,8 +780,12 @@ static void add_pci_device(PCIBus *bus, PCIDevice *d, void *opaque)
cells[j] = cpu_to_be32(d->devfn << 8 | cells[j]); cells[j] = cpu_to_be32(d->devfn << 8 | cells[j]);
if (d->io_regions[i].type & PCI_BASE_ADDRESS_SPACE_IO) { if (d->io_regions[i].type & PCI_BASE_ADDRESS_SPACE_IO) {
cells[j] |= cpu_to_be32(1 << 24); cells[j] |= cpu_to_be32(1 << 24);
} else {
if (d->io_regions[i].type & PCI_BASE_ADDRESS_MEM_TYPE_64) {
cells[j] |= cpu_to_be32(3 << 24);
} else { } else {
cells[j] |= cpu_to_be32(2 << 24); cells[j] |= cpu_to_be32(2 << 24);
}
if (d->io_regions[i].type & PCI_BASE_ADDRESS_MEM_PREFETCH) { if (d->io_regions[i].type & PCI_BASE_ADDRESS_MEM_PREFETCH) {
cells[j] |= cpu_to_be32(4 << 28); cells[j] |= cpu_to_be32(4 << 28);
} }