target-lm32: make cpu-qom.h not target specific
Make LM32CPU an opaque type within cpu-qom.h, and move all definitions of private methods, as well as all type definitions that require knowledge of the layout to cpu.h. This helps making files independent of NEED_CPU_H if they only need to pass around CPU pointers. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -47,45 +47,6 @@ typedef struct LM32CPUClass {
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void (*parent_reset)(CPUState *cpu);
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void (*parent_reset)(CPUState *cpu);
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} LM32CPUClass;
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} LM32CPUClass;
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/**
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typedef struct LM32CPU LM32CPU;
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* LM32CPU:
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* @env: #CPULM32State
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*
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* A LatticeMico32 CPU.
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*/
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typedef struct LM32CPU {
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/*< private >*/
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CPUState parent_obj;
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/*< public >*/
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CPULM32State env;
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uint32_t revision;
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uint8_t num_interrupts;
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uint8_t num_breakpoints;
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uint8_t num_watchpoints;
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uint32_t features;
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} LM32CPU;
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static inline LM32CPU *lm32_env_get_cpu(CPULM32State *env)
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{
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return container_of(env, LM32CPU, env);
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}
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#define ENV_GET_CPU(e) CPU(lm32_env_get_cpu(e))
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#define ENV_OFFSET offsetof(LM32CPU, env)
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#ifndef CONFIG_USER_ONLY
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extern const struct VMStateDescription vmstate_lm32_cpu;
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#endif
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void lm32_cpu_do_interrupt(CPUState *cpu);
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bool lm32_cpu_exec_interrupt(CPUState *cs, int int_req);
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void lm32_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
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int flags);
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hwaddr lm32_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
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int lm32_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
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int lm32_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
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#endif
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#endif
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@ -25,6 +25,7 @@
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#define CPUArchState struct CPULM32State
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#define CPUArchState struct CPULM32State
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#include "qemu-common.h"
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#include "qemu-common.h"
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#include "cpu-qom.h"
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#include "exec/cpu-defs.h"
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#include "exec/cpu-defs.h"
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struct CPULM32State;
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struct CPULM32State;
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typedef struct CPULM32State CPULM32State;
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typedef struct CPULM32State CPULM32State;
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@ -180,6 +181,47 @@ struct CPULM32State {
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};
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};
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/**
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* LM32CPU:
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* @env: #CPULM32State
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*
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* A LatticeMico32 CPU.
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*/
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struct LM32CPU {
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/*< private >*/
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CPUState parent_obj;
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/*< public >*/
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CPULM32State env;
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uint32_t revision;
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uint8_t num_interrupts;
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uint8_t num_breakpoints;
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uint8_t num_watchpoints;
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uint32_t features;
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};
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static inline LM32CPU *lm32_env_get_cpu(CPULM32State *env)
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{
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return container_of(env, LM32CPU, env);
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}
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#define ENV_GET_CPU(e) CPU(lm32_env_get_cpu(e))
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#define ENV_OFFSET offsetof(LM32CPU, env)
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#ifndef CONFIG_USER_ONLY
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extern const struct VMStateDescription vmstate_lm32_cpu;
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#endif
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void lm32_cpu_do_interrupt(CPUState *cpu);
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bool lm32_cpu_exec_interrupt(CPUState *cs, int int_req);
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void lm32_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
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int flags);
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hwaddr lm32_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
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int lm32_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
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int lm32_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
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typedef enum {
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typedef enum {
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LM32_WP_DISABLED = 0,
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LM32_WP_DISABLED = 0,
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LM32_WP_READ,
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LM32_WP_READ,
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@ -193,8 +235,6 @@ static inline lm32_wp_t lm32_wp_type(uint32_t dc, int idx)
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return (dc >> (idx+1)*2) & 0x3;
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return (dc >> (idx+1)*2) & 0x3;
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}
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}
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#include "cpu-qom.h"
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LM32CPU *cpu_lm32_init(const char *cpu_model);
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LM32CPU *cpu_lm32_init(const char *cpu_model);
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int cpu_lm32_exec(CPUState *cpu);
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int cpu_lm32_exec(CPUState *cpu);
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/* you can call this signal handler from your SIGBUS and SIGSEGV
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/* you can call this signal handler from your SIGBUS and SIGSEGV
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