accel/tcg: Avoid reading too much in load_atom_{2,4}
When load_atom_extract_al16_or_al8 is inexpensive, we want to use it early, in order to avoid the overhead of required_atomicity. However, we must not read past the end of the page. If there are more than 8 bytes remaining, then both the "aligned 16" and "aligned 8" paths align down so that the read has at least 16 bytes remaining on the page. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -404,7 +404,10 @@ static uint16_t load_atom_2(CPUArchState *env, uintptr_t ra,
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return load_atomic2(pv);
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}
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if (HAVE_ATOMIC128_RO) {
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return load_atom_extract_al16_or_al8(pv, 2);
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intptr_t left_in_page = -(pi | TARGET_PAGE_MASK);
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if (likely(left_in_page > 8)) {
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return load_atom_extract_al16_or_al8(pv, 2);
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}
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}
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atmax = required_atomicity(env, pi, memop);
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@ -443,7 +446,10 @@ static uint32_t load_atom_4(CPUArchState *env, uintptr_t ra,
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return load_atomic4(pv);
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}
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if (HAVE_ATOMIC128_RO) {
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return load_atom_extract_al16_or_al8(pv, 4);
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intptr_t left_in_page = -(pi | TARGET_PAGE_MASK);
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if (likely(left_in_page > 8)) {
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return load_atom_extract_al16_or_al8(pv, 4);
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}
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}
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atmax = required_atomicity(env, pi, memop);
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@ -9,7 +9,7 @@ AARCH64_SRC=$(SRC_PATH)/tests/tcg/aarch64
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VPATH += $(AARCH64_SRC)
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# Base architecture tests
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AARCH64_TESTS=fcvt pcalign-a64
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AARCH64_TESTS=fcvt pcalign-a64 lse2-fault
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fcvt: LDFLAGS+=-lm
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38
tests/tcg/aarch64/lse2-fault.c
Normal file
38
tests/tcg/aarch64/lse2-fault.c
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@ -0,0 +1,38 @@
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#include <sys/mman.h>
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#include <sys/shm.h>
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#include <unistd.h>
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#include <stdio.h>
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int main()
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{
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int psize = getpagesize();
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int id;
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void *p;
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/*
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* We need a shared mapping to enter CF_PARALLEL mode.
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* The easiest way to get that is shmat.
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*/
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id = shmget(IPC_PRIVATE, 2 * psize, IPC_CREAT | 0600);
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if (id < 0) {
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perror("shmget");
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return 2;
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}
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p = shmat(id, NULL, 0);
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if (p == MAP_FAILED) {
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perror("shmat");
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return 2;
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}
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/* Protect the second page. */
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if (mprotect(p + psize, psize, PROT_NONE) < 0) {
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perror("mprotect");
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return 2;
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}
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/*
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* Load 4 bytes, 6 bytes from the end of the page.
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* On success this will load 0 from the newly allocated shm.
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*/
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return *(int *)(p + psize - 6);
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}
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