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target/ppc: Refactor tcg radix mmu code

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The mmu-radix64.c file implements functions to enable the radix mmu
emulation in tcg mode. There is a function ppc_radix64_walk_tree() which
performs the radix tree walk and also implicitly checks the pte
protection.

Move the protection checking of the pte from the ppc_radix64_walk_tree()
function into the caller. This means the ppc_radix64_walk_tree() function
can be used without protection checking which is useful for debugging.

ppc_radix64_walk_tree() no longer needs to take the rwx and prot variables.

Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Suraj Jitindar Singh 2017-07-03 16:19:46 +10:00 committed by David Gibson
parent 3340e5c4f2
commit 6a042827b6
1 changed files with 8 additions and 14 deletions
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22
target/ppc/mmu-radix64.c
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@ -147,11 +147,10 @@ static void ppc_radix64_set_rc(PowerPCCPU *cpu, int rwx, uint64_t pte,
} }
} }
static uint64_t ppc_radix64_walk_tree(PowerPCCPU *cpu, int rwx, vaddr eaddr, static uint64_t ppc_radix64_walk_tree(PowerPCCPU *cpu, vaddr eaddr,
uint64_t base_addr, uint64_t nls, uint64_t base_addr, uint64_t nls,
hwaddr *raddr, int *psize, hwaddr *raddr, int *psize,
int *fault_cause, int *prot, int *fault_cause, hwaddr *pte_addr)
hwaddr *pte_addr)
{ {
CPUState *cs = CPU(cpu); CPUState *cs = CPU(cpu);
uint64_t index, pde; uint64_t index, pde;
@ -177,10 +176,6 @@ static uint64_t ppc_radix64_walk_tree(PowerPCCPU *cpu, int rwx, vaddr eaddr,
uint64_t rpn = pde & R_PTE_RPN; uint64_t rpn = pde & R_PTE_RPN;
uint64_t mask = (1UL << *psize) - 1; uint64_t mask = (1UL << *psize) - 1;
if (ppc_radix64_check_prot(cpu, rwx, pde, fault_cause, prot)) {
return 0; /* Protection Denied Access */
}
/* Or high bits of rpn and low bits to ea to form whole real addr */ /* Or high bits of rpn and low bits to ea to form whole real addr */
*raddr = (rpn & ~mask) | (eaddr & mask); *raddr = (rpn & ~mask) | (eaddr & mask);
*pte_addr = base_addr + (index * sizeof(pde)); *pte_addr = base_addr + (index * sizeof(pde));
@ -188,9 +183,8 @@ static uint64_t ppc_radix64_walk_tree(PowerPCCPU *cpu, int rwx, vaddr eaddr,
} }
/* Next Level of Radix Tree */ /* Next Level of Radix Tree */
return ppc_radix64_walk_tree(cpu, rwx, eaddr, pde & R_PDE_NLB, return ppc_radix64_walk_tree(cpu, eaddr, pde & R_PDE_NLB, pde & R_PDE_NLS,
pde & R_PDE_NLS, raddr, psize, raddr, psize, fault_cause, pte_addr);
fault_cause, prot, pte_addr);
} }
int ppc_radix64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, int ppc_radix64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx,
@ -241,11 +235,11 @@ int ppc_radix64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx,
/* Walk Radix Tree from Process Table Entry to Convert EA to RA */ /* Walk Radix Tree from Process Table Entry to Convert EA to RA */
page_size = PRTBE_R_GET_RTS(prtbe0); page_size = PRTBE_R_GET_RTS(prtbe0);
pte = ppc_radix64_walk_tree(cpu, rwx, eaddr & R_EADDR_MASK, pte = ppc_radix64_walk_tree(cpu, eaddr & R_EADDR_MASK,
prtbe0 & PRTBE_R_RPDB, prtbe0 & PRTBE_R_RPDS, prtbe0 & PRTBE_R_RPDB, prtbe0 & PRTBE_R_RPDS,
&raddr, &page_size, &fault_cause, &prot, &raddr, &page_size, &fault_cause, &pte_addr);
&pte_addr); if (!pte || ppc_radix64_check_prot(cpu, rwx, pte, &fault_cause, &prot)) {
if (!pte) { /* Couldn't get pte or access denied due to protection */
ppc_radix64_raise_si(cpu, rwx, eaddr, fault_cause); ppc_radix64_raise_si(cpu, rwx, eaddr, fault_cause);
return 1; return 1;
} }