mirrors/qemu
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

target/arm: Use GDBFeature for dynamic XML

Browse Source 
In preparation for a change to use GDBFeature as a parameter of
gdb_register_coprocessor(), convert the internal representation of
dynamic feature from plain XML to GDBFeature.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231213-gdb-v17-1-777047380591@daynix.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240227144335.1196131-6-alex.bennee@linaro.org>
This commit is contained in:
Akihiko Odaki 2024-02-27 14:43:11 +00:00 committed by Alex Bennée
parent 8467ac75b3
commit 690bd97b5b
4 changed files with 122 additions and 136 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
target/arm/cpu.h
View File

@ -25,6 +25,7 @@
#include "hw/registerfields.h" #include "hw/registerfields.h"
#include "cpu-qom.h" #include "cpu-qom.h"
#include "exec/cpu-defs.h" #include "exec/cpu-defs.h"
#include "exec/gdbstub.h"
#include "qapi/qapi-types-common.h" #include "qapi/qapi-types-common.h"
#include "target/arm/multiprocessing.h" #include "target/arm/multiprocessing.h"
#include "target/arm/gtimer.h" #include "target/arm/gtimer.h"
@ -117,23 +118,21 @@
*/ */
/** /**
* DynamicGDBXMLInfo: * DynamicGDBFeatureInfo:
* @desc: Contains the XML descriptions. * @desc: Contains the feature descriptions.
* @num: Number of the registers in this XML seen by GDB.
* @data: A union with data specific to the set of registers * @data: A union with data specific to the set of registers
* @cpregs_keys: Array that contains the corresponding Key of * @cpregs_keys: Array that contains the corresponding Key of
* a given cpreg with the same order of the cpreg * a given cpreg with the same order of the cpreg
* in the XML description. * in the XML description.
*/ */
typedef struct DynamicGDBXMLInfo { typedef struct DynamicGDBFeatureInfo {
char *desc; GDBFeature desc;
int num;
union { union {
struct { struct {
uint32_t *keys; uint32_t *keys;
} cpregs; } cpregs;
} data; } data;
} DynamicGDBXMLInfo; } DynamicGDBFeatureInfo;
/* CPU state for each instance of a generic timer (in cp15 c14) */ /* CPU state for each instance of a generic timer (in cp15 c14) */
typedef struct ARMGenericTimer { typedef struct ARMGenericTimer {
@ -855,10 +854,10 @@ struct ArchCPU {
uint64_t *cpreg_vmstate_values; uint64_t *cpreg_vmstate_values;
int32_t cpreg_vmstate_array_len; int32_t cpreg_vmstate_array_len;
DynamicGDBXMLInfo dyn_sysreg_xml; DynamicGDBFeatureInfo dyn_sysreg_feature;
DynamicGDBXMLInfo dyn_svereg_xml; DynamicGDBFeatureInfo dyn_svereg_feature;
DynamicGDBXMLInfo dyn_m_systemreg_xml; DynamicGDBFeatureInfo dyn_m_systemreg_feature;
DynamicGDBXMLInfo dyn_m_secextreg_xml; DynamicGDBFeatureInfo dyn_m_secextreg_feature;
/* Timers used by the generic (architected) timer */ /* Timers used by the generic (architected) timer */
QEMUTimer *gt_timer[NUM_GTIMERS]; QEMUTimer *gt_timer[NUM_GTIMERS];

140
target/arm/gdbstub.c
View File

@ -26,11 +26,11 @@
#include "cpu-features.h" #include "cpu-features.h"
#include "cpregs.h" #include "cpregs.h"
typedef struct RegisterSysregXmlParam { typedef struct RegisterSysregFeatureParam {
CPUState *cs; CPUState *cs;
GString *s; GDBFeatureBuilder builder;
int n; int n;
} RegisterSysregXmlParam; } RegisterSysregFeatureParam;
/* Old gdb always expect FPA registers. Newer (xml-aware) gdb only expect /* Old gdb always expect FPA registers. Newer (xml-aware) gdb only expect
whatever the target description contains. Due to a historical mishap whatever the target description contains. Due to a historical mishap
@ -216,7 +216,7 @@ static int arm_gdb_get_sysreg(CPUARMState *env, GByteArray *buf, int reg)
const ARMCPRegInfo *ri; const ARMCPRegInfo *ri;
uint32_t key; uint32_t key;
key = cpu->dyn_sysreg_xml.data.cpregs.keys[reg]; key = cpu->dyn_sysreg_feature.data.cpregs.keys[reg];
ri = get_arm_cp_reginfo(cpu->cp_regs, key); ri = get_arm_cp_reginfo(cpu->cp_regs, key);
if (ri) { if (ri) {
if (cpreg_field_is_64bit(ri)) { if (cpreg_field_is_64bit(ri)) {
@ -233,34 +233,32 @@ static int arm_gdb_set_sysreg(CPUARMState *env, uint8_t *buf, int reg)
return 0; return 0;
} }
static void arm_gen_one_xml_sysreg_tag(GString *s, DynamicGDBXMLInfo *dyn_xml, static void arm_gen_one_feature_sysreg(GDBFeatureBuilder *builder,
DynamicGDBFeatureInfo *dyn_feature,
ARMCPRegInfo *ri, uint32_t ri_key, ARMCPRegInfo *ri, uint32_t ri_key,
int bitsize, int regnum) int bitsize, int n)
{ {
g_string_append_printf(s, "<reg name=\"%s\"", ri->name); gdb_feature_builder_append_reg(builder, ri->name, bitsize, n,
g_string_append_printf(s, " bitsize=\"%d\"", bitsize); "int", "cp_regs");
g_string_append_printf(s, " regnum=\"%d\"", regnum);
g_string_append_printf(s, " group=\"cp_regs\"/>"); dyn_feature->data.cpregs.keys[n] = ri_key;
dyn_xml->data.cpregs.keys[dyn_xml->num] = ri_key;
dyn_xml->num++;
} }
static void arm_register_sysreg_for_xml(gpointer key, gpointer value, static void arm_register_sysreg_for_feature(gpointer key, gpointer value,
gpointer p) gpointer p)
{ {
uint32_t ri_key = (uintptr_t)key; uint32_t ri_key = (uintptr_t)key;
ARMCPRegInfo *ri = value; ARMCPRegInfo *ri = value;
RegisterSysregXmlParam *param = (RegisterSysregXmlParam *)p; RegisterSysregFeatureParam *param = p;
GString *s = param->s;
ARMCPU *cpu = ARM_CPU(param->cs); ARMCPU *cpu = ARM_CPU(param->cs);
CPUARMState *env = &cpu->env; CPUARMState *env = &cpu->env;
DynamicGDBXMLInfo *dyn_xml = &cpu->dyn_sysreg_xml; DynamicGDBFeatureInfo *dyn_feature = &cpu->dyn_sysreg_feature;
if (!(ri->type & (ARM_CP_NO_RAW | ARM_CP_NO_GDB))) { if (!(ri->type & (ARM_CP_NO_RAW | ARM_CP_NO_GDB))) {
if (arm_feature(env, ARM_FEATURE_AARCH64)) { if (arm_feature(env, ARM_FEATURE_AARCH64)) {
if (ri->state == ARM_CP_STATE_AA64) { if (ri->state == ARM_CP_STATE_AA64) {
arm_gen_one_xml_sysreg_tag(s , dyn_xml, ri, ri_key, 64, arm_gen_one_feature_sysreg(&param->builder, dyn_feature,
param->n++); ri, ri_key, 64, param->n++);
} }
} else { } else {
if (ri->state == ARM_CP_STATE_AA32) { if (ri->state == ARM_CP_STATE_AA32) {
@ -269,32 +267,32 @@ static void arm_register_sysreg_for_xml(gpointer key, gpointer value,
return; return;
} }
if (ri->type & ARM_CP_64BIT) { if (ri->type & ARM_CP_64BIT) {
arm_gen_one_xml_sysreg_tag(s , dyn_xml, ri, ri_key, 64, arm_gen_one_feature_sysreg(&param->builder, dyn_feature,
param->n++); ri, ri_key, 64, param->n++);
} else { } else {
arm_gen_one_xml_sysreg_tag(s , dyn_xml, ri, ri_key, 32, arm_gen_one_feature_sysreg(&param->builder, dyn_feature,
param->n++); ri, ri_key, 32, param->n++);
} }
} }
} }
} }
} }
static int arm_gen_dynamic_sysreg_xml(CPUState *cs, int base_reg) static GDBFeature *arm_gen_dynamic_sysreg_feature(CPUState *cs, int base_reg)
{ {
ARMCPU *cpu = ARM_CPU(cs); ARMCPU *cpu = ARM_CPU(cs);
GString *s = g_string_new(NULL); RegisterSysregFeatureParam param = {cs};
RegisterSysregXmlParam param = {cs, s, base_reg}; gsize num_regs = g_hash_table_size(cpu->cp_regs);
cpu->dyn_sysreg_xml.num = 0; gdb_feature_builder_init(&param.builder,
cpu->dyn_sysreg_xml.data.cpregs.keys = g_new(uint32_t, g_hash_table_size(cpu->cp_regs)); &cpu->dyn_sysreg_feature.desc,
g_string_printf(s, "<?xml version=\"1.0\"?>"); "org.qemu.gdb.arm.sys.regs",
g_string_append_printf(s, "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"); "system-registers.xml",
g_string_append_printf(s, "<feature name=\"org.qemu.gdb.arm.sys.regs\">"); base_reg);
g_hash_table_foreach(cpu->cp_regs, arm_register_sysreg_for_xml, &param); cpu->dyn_sysreg_feature.data.cpregs.keys = g_new(uint32_t, num_regs);
g_string_append_printf(s, "</feature>"); g_hash_table_foreach(cpu->cp_regs, arm_register_sysreg_for_feature, &param);
cpu->dyn_sysreg_xml.desc = g_string_free(s, false); gdb_feature_builder_end(&param.builder);
return cpu->dyn_sysreg_xml.num; return &cpu->dyn_sysreg_feature.desc;
} }
#ifdef CONFIG_TCG #ifdef CONFIG_TCG
@ -386,31 +384,29 @@ static int arm_gdb_set_m_systemreg(CPUARMState *env, uint8_t *buf, int reg)
return 0; /* TODO */ return 0; /* TODO */
} }
static int arm_gen_dynamic_m_systemreg_xml(CPUState *cs, int orig_base_reg) static GDBFeature *arm_gen_dynamic_m_systemreg_feature(CPUState *cs,
int base_reg)
{ {
ARMCPU *cpu = ARM_CPU(cs); ARMCPU *cpu = ARM_CPU(cs);
CPUARMState *env = &cpu->env; CPUARMState *env = &cpu->env;
GString *s = g_string_new(NULL); GDBFeatureBuilder builder;
int base_reg = orig_base_reg; int reg = 0;
int i; int i;
g_string_printf(s, "<?xml version=\"1.0\"?>"); gdb_feature_builder_init(&builder, &cpu->dyn_m_systemreg_feature.desc,
g_string_append_printf(s, "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"); "org.gnu.gdb.arm.m-system", "arm-m-system.xml",
g_string_append_printf(s, "<feature name=\"org.gnu.gdb.arm.m-system\">\n"); base_reg);
for (i = 0; i < ARRAY_SIZE(m_sysreg_def); i++) { for (i = 0; i < ARRAY_SIZE(m_sysreg_def); i++) {
if (arm_feature(env, m_sysreg_def[i].feature)) { if (arm_feature(env, m_sysreg_def[i].feature)) {
g_string_append_printf(s, gdb_feature_builder_append_reg(&builder, m_sysreg_def[i].name, 32,
"<reg name=\"%s\" bitsize=\"32\" regnum=\"%d\"/>\n", reg++, "int", NULL);
m_sysreg_def[i].name, base_reg++);
} }
} }
g_string_append_printf(s, "</feature>"); gdb_feature_builder_end(&builder);
cpu->dyn_m_systemreg_xml.desc = g_string_free(s, false);
cpu->dyn_m_systemreg_xml.num = base_reg - orig_base_reg;
return cpu->dyn_m_systemreg_xml.num; return &cpu->dyn_m_systemreg_feature.desc;
} }
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
@ -428,31 +424,31 @@ static int arm_gdb_set_m_secextreg(CPUARMState *env, uint8_t *buf, int reg)
return 0; /* TODO */ return 0; /* TODO */
} }
static int arm_gen_dynamic_m_secextreg_xml(CPUState *cs, int orig_base_reg) static GDBFeature *arm_gen_dynamic_m_secextreg_feature(CPUState *cs,
int base_reg)
{ {
ARMCPU *cpu = ARM_CPU(cs); ARMCPU *cpu = ARM_CPU(cs);
GString *s = g_string_new(NULL); GDBFeatureBuilder builder;
int base_reg = orig_base_reg; char *name;
int reg = 0;
int i; int i;
g_string_printf(s, "<?xml version=\"1.0\"?>"); gdb_feature_builder_init(&builder, &cpu->dyn_m_secextreg_feature.desc,
g_string_append_printf(s, "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"); "org.gnu.gdb.arm.secext", "arm-m-secext.xml",
g_string_append_printf(s, "<feature name=\"org.gnu.gdb.arm.secext\">\n"); base_reg);
for (i = 0; i < ARRAY_SIZE(m_sysreg_def); i++) { for (i = 0; i < ARRAY_SIZE(m_sysreg_def); i++) {
g_string_append_printf(s, name = g_strconcat(m_sysreg_def[i].name, "_ns", NULL);
"<reg name=\"%s_ns\" bitsize=\"32\" regnum=\"%d\"/>\n", gdb_feature_builder_append_reg(&builder, name, 32, reg++,
m_sysreg_def[i].name, base_reg++); "int", NULL);
g_string_append_printf(s, name = g_strconcat(m_sysreg_def[i].name, "_s", NULL);
"<reg name=\"%s_s\" bitsize=\"32\" regnum=\"%d\"/>\n", gdb_feature_builder_append_reg(&builder, name, 32, reg++,
m_sysreg_def[i].name, base_reg++); "int", NULL);
} }
g_string_append_printf(s, "</feature>"); gdb_feature_builder_end(&builder);
cpu->dyn_m_secextreg_xml.desc = g_string_free(s, false);
cpu->dyn_m_secextreg_xml.num = base_reg - orig_base_reg;
return cpu->dyn_m_secextreg_xml.num; return &cpu->dyn_m_secextreg_feature.desc;
} }
#endif #endif
#endif /* CONFIG_TCG */ #endif /* CONFIG_TCG */
@ -462,14 +458,14 @@ const char *arm_gdb_get_dynamic_xml(CPUState *cs, const char *xmlname)
ARMCPU *cpu = ARM_CPU(cs); ARMCPU *cpu = ARM_CPU(cs);
if (strcmp(xmlname, "system-registers.xml") == 0) { if (strcmp(xmlname, "system-registers.xml") == 0) {
return cpu->dyn_sysreg_xml.desc; return cpu->dyn_sysreg_feature.desc.xml;
} else if (strcmp(xmlname, "sve-registers.xml") == 0) { } else if (strcmp(xmlname, "sve-registers.xml") == 0) {
return cpu->dyn_svereg_xml.desc; return cpu->dyn_svereg_feature.desc.xml;
} else if (strcmp(xmlname, "arm-m-system.xml") == 0) { } else if (strcmp(xmlname, "arm-m-system.xml") == 0) {
return cpu->dyn_m_systemreg_xml.desc; return cpu->dyn_m_systemreg_feature.desc.xml;
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
} else if (strcmp(xmlname, "arm-m-secext.xml") == 0) { } else if (strcmp(xmlname, "arm-m-secext.xml") == 0) {
return cpu->dyn_m_secextreg_xml.desc; return cpu->dyn_m_secextreg_feature.desc.xml;
#endif #endif
} }
return NULL; return NULL;
@ -487,7 +483,7 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
*/ */
#ifdef TARGET_AARCH64 #ifdef TARGET_AARCH64
if (isar_feature_aa64_sve(&cpu->isar)) { if (isar_feature_aa64_sve(&cpu->isar)) {
int nreg = arm_gen_dynamic_svereg_xml(cs, cs->gdb_num_regs); int nreg = arm_gen_dynamic_svereg_feature(cs, cs->gdb_num_regs)->num_regs;
gdb_register_coprocessor(cs, aarch64_gdb_get_sve_reg, gdb_register_coprocessor(cs, aarch64_gdb_get_sve_reg,
aarch64_gdb_set_sve_reg, nreg, aarch64_gdb_set_sve_reg, nreg,
"sve-registers.xml", 0); "sve-registers.xml", 0);
@ -533,20 +529,20 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
1, "arm-m-profile-mve.xml", 0); 1, "arm-m-profile-mve.xml", 0);
} }
gdb_register_coprocessor(cs, arm_gdb_get_sysreg, arm_gdb_set_sysreg, gdb_register_coprocessor(cs, arm_gdb_get_sysreg, arm_gdb_set_sysreg,
arm_gen_dynamic_sysreg_xml(cs, cs->gdb_num_regs), arm_gen_dynamic_sysreg_feature(cs, cs->gdb_num_regs)->num_regs,
"system-registers.xml", 0); "system-registers.xml", 0);
#ifdef CONFIG_TCG #ifdef CONFIG_TCG
if (arm_feature(env, ARM_FEATURE_M) && tcg_enabled()) { if (arm_feature(env, ARM_FEATURE_M) && tcg_enabled()) {
gdb_register_coprocessor(cs, gdb_register_coprocessor(cs,
arm_gdb_get_m_systemreg, arm_gdb_set_m_systemreg, arm_gdb_get_m_systemreg, arm_gdb_set_m_systemreg,
arm_gen_dynamic_m_systemreg_xml(cs, cs->gdb_num_regs), arm_gen_dynamic_m_systemreg_feature(cs, cs->gdb_num_regs)->num_regs,
"arm-m-system.xml", 0); "arm-m-system.xml", 0);
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
if (arm_feature(env, ARM_FEATURE_M_SECURITY)) { if (arm_feature(env, ARM_FEATURE_M_SECURITY)) {
gdb_register_coprocessor(cs, gdb_register_coprocessor(cs,
arm_gdb_get_m_secextreg, arm_gdb_set_m_secextreg, arm_gdb_get_m_secextreg, arm_gdb_set_m_secextreg,
arm_gen_dynamic_m_secextreg_xml(cs, cs->gdb_num_regs), arm_gen_dynamic_m_secextreg_feature(cs, cs->gdb_num_regs)->num_regs,
"arm-m-secext.xml", 0); "arm-m-secext.xml", 0);
} }
#endif #endif

95
target/arm/gdbstub64.c
View File

@ -247,7 +247,7 @@ int aarch64_gdb_set_pauth_reg(CPUARMState *env, uint8_t *buf, int reg)
return 0; return 0;
} }
static void output_vector_union_type(GString *s, int reg_width, static void output_vector_union_type(GDBFeatureBuilder *builder, int reg_width,
const char *name) const char *name)
{ {
struct TypeSize { struct TypeSize {
@ -282,10 +282,10 @@ static void output_vector_union_type(GString *s, int reg_width,
/* First define types and totals in a whole VL */ /* First define types and totals in a whole VL */
for (i = 0; i < ARRAY_SIZE(vec_lanes); i++) { for (i = 0; i < ARRAY_SIZE(vec_lanes); i++) {
g_string_append_printf(s, gdb_feature_builder_append_tag(
"<vector id=\"%s%c%c\" type=\"%s\" count=\"%d\"/>", builder, "<vector id=\"%s%c%c\" type=\"%s\" count=\"%d\"/>",
name, vec_lanes[i].sz, vec_lanes[i].suffix, name, vec_lanes[i].sz, vec_lanes[i].suffix,
vec_lanes[i].gdb_type, reg_width / vec_lanes[i].size); vec_lanes[i].gdb_type, reg_width / vec_lanes[i].size);
} }
/* /*
@ -296,86 +296,77 @@ static void output_vector_union_type(GString *s, int reg_width,
for (i = 0; i < ARRAY_SIZE(suf); i++) { for (i = 0; i < ARRAY_SIZE(suf); i++) {
int bits = 8 << i; int bits = 8 << i;
g_string_append_printf(s, "<union id=\"%sn%c\">", name, suf[i]); gdb_feature_builder_append_tag(builder, "<union id=\"%sn%c\">",
name, suf[i]);
for (j = 0; j < ARRAY_SIZE(vec_lanes); j++) { for (j = 0; j < ARRAY_SIZE(vec_lanes); j++) {
if (vec_lanes[j].size == bits) { if (vec_lanes[j].size == bits) {
g_string_append_printf(s, "<field name=\"%c\" type=\"%s%c%c\"/>", gdb_feature_builder_append_tag(
vec_lanes[j].suffix, name, builder, "<field name=\"%c\" type=\"%s%c%c\"/>",
vec_lanes[j].sz, vec_lanes[j].suffix); vec_lanes[j].suffix, name,
vec_lanes[j].sz, vec_lanes[j].suffix);
} }
} }
g_string_append(s, "</union>"); gdb_feature_builder_append_tag(builder, "</union>");
} }
/* And now the final union of unions */ /* And now the final union of unions */
g_string_append_printf(s, "<union id=\"%s\">", name); gdb_feature_builder_append_tag(builder, "<union id=\"%s\">", name);
for (i = ARRAY_SIZE(suf) - 1; i >= 0; i--) { for (i = ARRAY_SIZE(suf) - 1; i >= 0; i--) {
g_string_append_printf(s, "<field name=\"%c\" type=\"%sn%c\"/>", gdb_feature_builder_append_tag(builder,
suf[i], name, suf[i]); "<field name=\"%c\" type=\"%sn%c\"/>",
suf[i], name, suf[i]);
} }
g_string_append(s, "</union>"); gdb_feature_builder_append_tag(builder, "</union>");
} }
int arm_gen_dynamic_svereg_xml(CPUState *cs, int orig_base_reg) GDBFeature *arm_gen_dynamic_svereg_feature(CPUState *cs, int base_reg)
{ {
ARMCPU *cpu = ARM_CPU(cs); ARMCPU *cpu = ARM_CPU(cs);
GString *s = g_string_new(NULL);
DynamicGDBXMLInfo *info = &cpu->dyn_svereg_xml;
int reg_width = cpu->sve_max_vq * 128; int reg_width = cpu->sve_max_vq * 128;
int pred_width = cpu->sve_max_vq * 16; int pred_width = cpu->sve_max_vq * 16;
int base_reg = orig_base_reg; GDBFeatureBuilder builder;
char *name;
int reg = 0;
int i; int i;
g_string_printf(s, "<?xml version=\"1.0\"?>"); gdb_feature_builder_init(&builder, &cpu->dyn_svereg_feature.desc,
g_string_append_printf(s, "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"); "org.gnu.gdb.aarch64.sve", "sve-registers.xml",
g_string_append_printf(s, "<feature name=\"org.gnu.gdb.aarch64.sve\">"); base_reg);
/* Create the vector union type. */ /* Create the vector union type. */
output_vector_union_type(s, reg_width, "svev"); output_vector_union_type(&builder, reg_width, "svev");
/* Create the predicate vector type. */ /* Create the predicate vector type. */
g_string_append_printf(s, gdb_feature_builder_append_tag(
"<vector id=\"svep\" type=\"uint8\" count=\"%d\"/>", &builder, "<vector id=\"svep\" type=\"uint8\" count=\"%d\"/>",
pred_width / 8); pred_width / 8);
/* Define the vector registers. */ /* Define the vector registers. */
for (i = 0; i < 32; i++) { for (i = 0; i < 32; i++) {
g_string_append_printf(s, name = g_strdup_printf("z%d", i);
"<reg name=\"z%d\" bitsize=\"%d\"" gdb_feature_builder_append_reg(&builder, name, reg_width, reg++,
" regnum=\"%d\" type=\"svev\"/>", "svev", NULL);
i, reg_width, base_reg++);
} }
/* fpscr & status registers */ /* fpscr & status registers */
g_string_append_printf(s, "<reg name=\"fpsr\" bitsize=\"32\"" gdb_feature_builder_append_reg(&builder, "fpsr", 32, reg++,
" regnum=\"%d\" group=\"float\"" "int", "float");
" type=\"int\"/>", base_reg++); gdb_feature_builder_append_reg(&builder, "fpcr", 32, reg++,
g_string_append_printf(s, "<reg name=\"fpcr\" bitsize=\"32\"" "int", "float");
" regnum=\"%d\" group=\"float\""
" type=\"int\"/>", base_reg++);
/* Define the predicate registers. */ /* Define the predicate registers. */
for (i = 0; i < 16; i++) { for (i = 0; i < 16; i++) {
g_string_append_printf(s, name = g_strdup_printf("p%d", i);
"<reg name=\"p%d\" bitsize=\"%d\"" gdb_feature_builder_append_reg(&builder, name, pred_width, reg++,
" regnum=\"%d\" type=\"svep\"/>", "svep", NULL);
i, pred_width, base_reg++);
} }
g_string_append_printf(s, gdb_feature_builder_append_reg(&builder, "ffr", pred_width, reg++,
"<reg name=\"ffr\" bitsize=\"%d\"" "svep", "vector");
" regnum=\"%d\" group=\"vector\""
" type=\"svep\"/>",
pred_width, base_reg++);
/* Define the vector length pseudo-register. */ /* Define the vector length pseudo-register. */
g_string_append_printf(s, gdb_feature_builder_append_reg(&builder, "vg", 64, reg++, "int", NULL);
"<reg name=\"vg\" bitsize=\"64\""
" regnum=\"%d\" type=\"int\"/>",
base_reg++);
g_string_append_printf(s, "</feature>"); gdb_feature_builder_end(&builder);
info->desc = g_string_free(s, false); return &cpu->dyn_svereg_feature.desc;
info->num = base_reg - orig_base_reg;
return info->num;
} }

2
target/arm/internals.h
View File

@ -1451,7 +1451,7 @@ static inline uint64_t pmu_counter_mask(CPUARMState *env)
} }
#ifdef TARGET_AARCH64 #ifdef TARGET_AARCH64
int arm_gen_dynamic_svereg_xml(CPUState *cpu, int base_reg); GDBFeature *arm_gen_dynamic_svereg_feature(CPUState *cpu, int base_reg);
int aarch64_gdb_get_sve_reg(CPUARMState *env, GByteArray *buf, int reg); int aarch64_gdb_get_sve_reg(CPUARMState *env, GByteArray *buf, int reg);
int aarch64_gdb_set_sve_reg(CPUARMState *env, uint8_t *buf, int reg); int aarch64_gdb_set_sve_reg(CPUARMState *env, uint8_t *buf, int reg);
int aarch64_gdb_get_fpu_reg(CPUARMState *env, GByteArray *buf, int reg); int aarch64_gdb_get_fpu_reg(CPUARMState *env, GByteArray *buf, int reg);