target/hppa: fix PSW Q bit behaviour to match hardware

PA-RISC specification says: "Setting the PSW Q-bit, PSW{28}, to 1
with this instruction, if it was not already 1, is an undefined
operation." However, at least HP-UX 10.20 sets the Q bit from 0 to 1
with the SSM instruction. Tested this both on HP9000/712 and
HP9000/785/C3750, both machines set the Q bit from 0 to 1 without
exception. This makes HP-UX 10.20 progress a little bit further.

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Message-Id: <20190129191402.29539-1-svens@stackframe.org>
[rth: Add a comment to the code as well.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Sven Schnelle 2019-01-29 20:14:02 +01:00 committed by Richard Henderson
parent 5c41496dd7
commit 68aa851aa2

View File

@ -665,11 +665,15 @@ void HELPER(reset)(CPUHPPAState *env)
target_ureg HELPER(swap_system_mask)(CPUHPPAState *env, target_ureg nsm)
{
target_ulong psw = env->psw;
/* ??? On second reading this condition simply seems
to be undefined rather than a diagnosed trap. */
if (nsm & ~psw & PSW_Q) {
hppa_dynamic_excp(env, EXCP_ILL, GETPC());
}
/*
* Setting the PSW Q bit to 1, if it was not already 1, is an
* undefined operation.
*
* However, HP-UX 10.20 does this with the SSM instruction.
* Tested this on HP9000/712 and HP9000/785/C3750 and both
* machines set the Q bit from 0 to 1 without an exception,
* so let this go without comment.
*/
env->psw = (psw & ~PSW_SM) | (nsm & PSW_SM);
return psw & PSW_SM;
}