BSR/BSF undefined behaviour fix
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@809 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -513,7 +513,7 @@ void OPPROTO glue(glue(op_bsf, SUFFIX), _T0_cc)(void)
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count++;
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count++;
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res >>= 1;
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res >>= 1;
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}
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}
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T0 = count;
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T1 = count;
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CC_DST = 1; /* ZF = 0 */
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CC_DST = 1; /* ZF = 0 */
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} else {
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} else {
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CC_DST = 0; /* ZF = 1 */
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CC_DST = 0; /* ZF = 1 */
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@ -531,7 +531,7 @@ void OPPROTO glue(glue(op_bsr, SUFFIX), _T0_cc)(void)
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count--;
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count--;
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res <<= 1;
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res <<= 1;
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}
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}
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T0 = count;
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T1 = count;
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CC_DST = 1; /* ZF = 0 */
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CC_DST = 1; /* ZF = 0 */
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} else {
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} else {
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CC_DST = 0; /* ZF = 1 */
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CC_DST = 0; /* ZF = 1 */
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@ -3708,10 +3708,11 @@ static uint8_t *disas_insn(DisasContext *s, uint8_t *pc_start)
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modrm = ldub_code(s->pc++);
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modrm = ldub_code(s->pc++);
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reg = (modrm >> 3) & 7;
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reg = (modrm >> 3) & 7;
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gen_ldst_modrm(s, modrm, ot, OR_TMP0, 0);
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gen_ldst_modrm(s, modrm, ot, OR_TMP0, 0);
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/* NOTE: in order to handle the 0 case, we must load the
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result. It could be optimized with a generated jump */
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gen_op_mov_TN_reg[ot][1][reg]();
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gen_op_bsx_T0_cc[ot - OT_WORD][b & 1]();
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gen_op_bsx_T0_cc[ot - OT_WORD][b & 1]();
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/* NOTE: we always write back the result. Intel doc says it is
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gen_op_mov_reg_T1[ot][reg]();
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undefined if T0 == 0 */
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gen_op_mov_reg_T0[ot][reg]();
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s->cc_op = CC_OP_LOGICB + ot;
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s->cc_op = CC_OP_LOGICB + ot;
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break;
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break;
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/************************/
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/************************/
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