tcg/ppc: Sync tcg_out_test and constraints
Ensure the code structure is the same for matching constraints
and emitting code, lest we allow constants that cannot be
trivially tested.
Cc: qemu-stable@nongnu.org
Fixes: ad788aebba
("tcg/ppc: Support TCG_COND_TST{EQ,NE}")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2487
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <44328324-af73-4439-9d2b-d414e0e13dd7@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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@ -325,9 +325,11 @@ static bool tcg_target_const_match(int64_t sval, int ct,
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if ((uval & ~0xffff) == 0 || (uval & ~0xffff0000ull) == 0) {
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return 1;
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}
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if (TCG_TARGET_REG_BITS == 32 || type == TCG_TYPE_I32
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? mask_operand(uval, &mb, &me)
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: mask64_operand(uval << clz64(uval), &mb, &me)) {
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if (uval == (uint32_t)uval && mask_operand(uval, &mb, &me)) {
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return 1;
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}
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if (TCG_TARGET_REG_BITS == 64 &&
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mask64_operand(uval << clz64(uval), &mb, &me)) {
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return 1;
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}
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return 0;
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@ -1749,8 +1751,6 @@ static void tcg_out_test(TCGContext *s, TCGReg dest, TCGReg arg1, TCGArg arg2,
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if (type == TCG_TYPE_I32) {
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arg2 = (uint32_t)arg2;
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} else if (arg2 == (uint32_t)arg2) {
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type = TCG_TYPE_I32;
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}
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if ((arg2 & ~0xffff) == 0) {
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@ -1761,12 +1761,11 @@ static void tcg_out_test(TCGContext *s, TCGReg dest, TCGReg arg1, TCGArg arg2,
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tcg_out32(s, ANDIS | SAI(arg1, dest, arg2 >> 16));
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return;
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}
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if (TCG_TARGET_REG_BITS == 32 || type == TCG_TYPE_I32) {
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if (mask_operand(arg2, &mb, &me)) {
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tcg_out_rlw_rc(s, RLWINM, dest, arg1, 0, mb, me, rc);
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return;
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}
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} else {
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if (arg2 == (uint32_t)arg2 && mask_operand(arg2, &mb, &me)) {
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tcg_out_rlw_rc(s, RLWINM, dest, arg1, 0, mb, me, rc);
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return;
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}
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if (TCG_TARGET_REG_BITS == 64) {
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int sh = clz64(arg2);
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if (mask64_operand(arg2 << sh, &mb, &me)) {
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tcg_out_rld_rc(s, RLDICR, dest, arg1, sh, me, rc);
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