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Correctly identify multiple cpus in SMP systems

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Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Hervé Poussineau 2010-07-31 12:29:03 +02:00 committed by Aurelien Jarno
parent cf7c00d5c6
commit 671b0f368b
2 changed files with 2 additions and 4 deletions
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3
target-mips/op_helper.c
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@ -1359,8 +1359,7 @@ void helper_mtc0_cause (target_ulong arg1)
void helper_mtc0_ebase (target_ulong arg1)
{
/* vectored interrupts not implemented */
/* Multi-CPU not implemented */
env->CP0_EBase = 0x80000000 | (arg1 & 0x3FFFF000);
env->CP0_EBase = (env->CP0_EBase & ~0x3FFFF000) | (arg1 & 0x3FFFF000);
}
void helper_mtc0_config0 (target_ulong arg1)

3
target-mips/translate.c
View File

@ -12679,8 +12679,7 @@ void cpu_reset (CPUMIPSState *env)
env->CP0_Random = env->tlb->nb_tlb - 1;
env->tlb->tlb_in_use = env->tlb->nb_tlb;
env->CP0_Wired = 0;
/* SMP not implemented */
env->CP0_EBase = 0x80000000;
env->CP0_EBase = 0x80000000 | (env->cpu_index & 0x3FF);
env->CP0_Status = (1 << CP0St_BEV) | (1 << CP0St_ERL);
/* vectored interrupts not implemented, timer on int 7,
no performance counters. */