accel/tcg: spelling fixes
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> Message-ID: <20230823065335.1919380-18-mjt@tls.msk.ru> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20230823065335.1919380-19-mjt@tls.msk.ru> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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@ -1,5 +1,5 @@
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/*
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* Translation Block Maintaince
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* Translation Block Maintenance
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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@ -350,7 +350,7 @@ static int in_cache(Cache *cache, uint64_t addr)
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* @cache: The cache under simulation
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* @addr: The address of the requested memory location
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*
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* Returns true if the requsted data is hit in the cache and false when missed.
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* Returns true if the requested data is hit in the cache and false when missed.
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* The cache is updated on miss for the next access.
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*/
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static bool access_cache(Cache *cache, uint64_t addr)
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@ -108,7 +108,7 @@ static void report_divergance(ExecState *us, ExecState *them)
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/*
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* If we have diverged before did we get back on track or are we
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* totally loosing it?
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* totally losing it?
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*/
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if (divergence_log) {
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DivergeState *last = (DivergeState *) divergence_log->data;
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@ -14,7 +14,7 @@
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struct TCGCPUOps {
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/**
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* @initialize: Initalize TCG state
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* @initialize: Initialize TCG state
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*
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* Called when the first CPU is realized.
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*/
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@ -1,5 +1,5 @@
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/*
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* TCG Helper Infomation Structure
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* TCG Helper Information Structure
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*
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* Copyright (c) 2023 Linaro Ltd
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*
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@ -879,7 +879,7 @@ enum {
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/* Instruction operands are 64-bits (otherwise 32-bits). */
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TCG_OPF_64BIT = 0x10,
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/* Instruction is optional and not implemented by the host, or insn
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is generic and should not be implemened by the host. */
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is generic and should not be implemented by the host. */
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TCG_OPF_NOT_PRESENT = 0x20,
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/* Instruction operands are vectors. */
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TCG_OPF_VECTOR = 0x40,
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@ -1123,7 +1123,7 @@ static inline int tcg_can_emit_vec_op(TCGOpcode o, TCGType t, unsigned ve)
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/* Expand the tuple (opc, type, vece) on the given arguments. */
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void tcg_expand_vec_op(TCGOpcode, TCGType, unsigned, TCGArg, ...);
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/* Replicate a constant C accoring to the log2 of the element size. */
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/* Replicate a constant C according to the log2 of the element size. */
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uint64_t dup_const(unsigned vece, uint64_t c);
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#define dup_const(VECE, C) \
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@ -91,7 +91,7 @@
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*
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* The basic setup is that we make the host syscall via a known
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* section of host native assembly. If a signal occurs, our signal
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* handler checks the interrupted host PC against the addresse of that
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* handler checks the interrupted host PC against the address of that
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* known section. If the PC is before or at the address of the syscall
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* instruction then we change the PC to point at a "return
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* -QEMU_ERESTARTSYS" code path instead, and then exit the signal handler
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@ -780,7 +780,7 @@ int load_flt_binary(struct linux_binprm *bprm, struct image_info *info)
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/* Enforce final stack alignment of 16 bytes. This is sufficient
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for all current targets, and excess alignment is harmless. */
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stack_len = bprm->envc + bprm->argc + 2;
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stack_len += flat_argvp_envp_on_stack() ? 2 : 0; /* arvg, argp */
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stack_len += flat_argvp_envp_on_stack() ? 2 : 0; /* argv, argp */
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stack_len += 1; /* argc */
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stack_len *= sizeof(abi_ulong);
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sp -= (sp - stack_len) & 15;
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@ -1809,7 +1809,7 @@ static inline abi_long target_to_host_cmsg(struct msghdr *msgh,
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uint32_t *dst = (uint32_t *)data;
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memcpy(dst, target_data, len);
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/* fix endianess of first 32-bit word */
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/* fix endianness of first 32-bit word */
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if (len >= sizeof(uint32_t)) {
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*dst = tswap32(*dst);
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}
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@ -2920,7 +2920,7 @@ get_timeout:
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unlock_user(results, optval_addr, 0);
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return ret;
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}
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/* swap host endianess to target endianess. */
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/* swap host endianness to target endianness. */
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for (i = 0; i < (len / sizeof(uint32_t)); i++) {
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results[i] = tswap32(results[i]);
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}
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@ -8,7 +8,7 @@
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* targets that support it. Architecture specific handling is handled
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* in target/HW/HW-semi.c
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*
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* Semihosting is sightly strange in that it is also supported by some
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* Semihosting is slightly strange in that it is also supported by some
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* linux-user targets. However in that use case no configuration of
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* the outputs and command lines is supported.
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*
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@ -720,7 +720,7 @@ void semihost_sys_read_gf(CPUState *cs, gdb_syscall_complete_cb complete,
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GuestFD *gf, target_ulong buf, target_ulong len)
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{
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/*
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* Bound length for 64-bit guests on 32-bit hosts, not overlowing ssize_t.
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* Bound length for 64-bit guests on 32-bit hosts, not overflowing ssize_t.
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* Note the Linux kernel does this with MAX_RW_COUNT, so it's not a bad
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* idea to do this unconditionally.
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*/
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@ -761,7 +761,7 @@ void semihost_sys_write_gf(CPUState *cs, gdb_syscall_complete_cb complete,
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GuestFD *gf, target_ulong buf, target_ulong len)
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{
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/*
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* Bound length for 64-bit guests on 32-bit hosts, not overlowing ssize_t.
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* Bound length for 64-bit guests on 32-bit hosts, not overflowing ssize_t.
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* Note the Linux kernel does this with MAX_RW_COUNT, so it's not a bad
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* idea to do this unconditionally.
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*/
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@ -325,7 +325,7 @@ void icount_start_warp_timer(void)
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* vCPU is sleeping and warp can't be started.
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* It is probably a race condition: notification sent
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* to vCPU was processed in advance and vCPU went to sleep.
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* Therefore we have to wake it up for doing someting.
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* Therefore we have to wake it up for doing something.
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*/
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if (replay_has_event()) {
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qemu_clock_notify(QEMU_CLOCK_VIRTUAL);
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@ -22,7 +22,7 @@
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* THE SOFTWARE.
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*/
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/*
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* splitted out ioport related stuffs from vl.c.
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* split out ioport related stuffs from vl.c.
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*/
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#include "qemu/osdep.h"
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