accel/tcg: spelling fixes

Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Message-ID: <20230823065335.1919380-18-mjt@tls.msk.ru>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-ID: <20230823065335.1919380-19-mjt@tls.msk.ru>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
This commit is contained in:
Michael Tokarev 2023-08-23 08:53:30 +02:00 committed by Philippe Mathieu-Daudé
parent b91b0fc163
commit 669dcb606e
13 changed files with 16 additions and 16 deletions

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@ -1,5 +1,5 @@
/*
* Translation Block Maintaince
* Translation Block Maintenance
*
* Copyright (c) 2003 Fabrice Bellard
*

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@ -350,7 +350,7 @@ static int in_cache(Cache *cache, uint64_t addr)
* @cache: The cache under simulation
* @addr: The address of the requested memory location
*
* Returns true if the requsted data is hit in the cache and false when missed.
* Returns true if the requested data is hit in the cache and false when missed.
* The cache is updated on miss for the next access.
*/
static bool access_cache(Cache *cache, uint64_t addr)

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@ -108,7 +108,7 @@ static void report_divergance(ExecState *us, ExecState *them)
/*
* If we have diverged before did we get back on track or are we
* totally loosing it?
* totally losing it?
*/
if (divergence_log) {
DivergeState *last = (DivergeState *) divergence_log->data;

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@ -14,7 +14,7 @@
struct TCGCPUOps {
/**
* @initialize: Initalize TCG state
* @initialize: Initialize TCG state
*
* Called when the first CPU is realized.
*/

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@ -1,5 +1,5 @@
/*
* TCG Helper Infomation Structure
* TCG Helper Information Structure
*
* Copyright (c) 2023 Linaro Ltd
*

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@ -879,7 +879,7 @@ enum {
/* Instruction operands are 64-bits (otherwise 32-bits). */
TCG_OPF_64BIT = 0x10,
/* Instruction is optional and not implemented by the host, or insn
is generic and should not be implemened by the host. */
is generic and should not be implemented by the host. */
TCG_OPF_NOT_PRESENT = 0x20,
/* Instruction operands are vectors. */
TCG_OPF_VECTOR = 0x40,
@ -1123,7 +1123,7 @@ static inline int tcg_can_emit_vec_op(TCGOpcode o, TCGType t, unsigned ve)
/* Expand the tuple (opc, type, vece) on the given arguments. */
void tcg_expand_vec_op(TCGOpcode, TCGType, unsigned, TCGArg, ...);
/* Replicate a constant C accoring to the log2 of the element size. */
/* Replicate a constant C according to the log2 of the element size. */
uint64_t dup_const(unsigned vece, uint64_t c);
#define dup_const(VECE, C) \

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@ -91,7 +91,7 @@
*
* The basic setup is that we make the host syscall via a known
* section of host native assembly. If a signal occurs, our signal
* handler checks the interrupted host PC against the addresse of that
* handler checks the interrupted host PC against the address of that
* known section. If the PC is before or at the address of the syscall
* instruction then we change the PC to point at a "return
* -QEMU_ERESTARTSYS" code path instead, and then exit the signal handler

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@ -780,7 +780,7 @@ int load_flt_binary(struct linux_binprm *bprm, struct image_info *info)
/* Enforce final stack alignment of 16 bytes. This is sufficient
for all current targets, and excess alignment is harmless. */
stack_len = bprm->envc + bprm->argc + 2;
stack_len += flat_argvp_envp_on_stack() ? 2 : 0; /* arvg, argp */
stack_len += flat_argvp_envp_on_stack() ? 2 : 0; /* argv, argp */
stack_len += 1; /* argc */
stack_len *= sizeof(abi_ulong);
sp -= (sp - stack_len) & 15;

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@ -1809,7 +1809,7 @@ static inline abi_long target_to_host_cmsg(struct msghdr *msgh,
uint32_t *dst = (uint32_t *)data;
memcpy(dst, target_data, len);
/* fix endianess of first 32-bit word */
/* fix endianness of first 32-bit word */
if (len >= sizeof(uint32_t)) {
*dst = tswap32(*dst);
}
@ -2920,7 +2920,7 @@ get_timeout:
unlock_user(results, optval_addr, 0);
return ret;
}
/* swap host endianess to target endianess. */
/* swap host endianness to target endianness. */
for (i = 0; i < (len / sizeof(uint32_t)); i++) {
results[i] = tswap32(results[i]);
}

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@ -8,7 +8,7 @@
* targets that support it. Architecture specific handling is handled
* in target/HW/HW-semi.c
*
* Semihosting is sightly strange in that it is also supported by some
* Semihosting is slightly strange in that it is also supported by some
* linux-user targets. However in that use case no configuration of
* the outputs and command lines is supported.
*

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@ -720,7 +720,7 @@ void semihost_sys_read_gf(CPUState *cs, gdb_syscall_complete_cb complete,
GuestFD *gf, target_ulong buf, target_ulong len)
{
/*
* Bound length for 64-bit guests on 32-bit hosts, not overlowing ssize_t.
* Bound length for 64-bit guests on 32-bit hosts, not overflowing ssize_t.
* Note the Linux kernel does this with MAX_RW_COUNT, so it's not a bad
* idea to do this unconditionally.
*/
@ -761,7 +761,7 @@ void semihost_sys_write_gf(CPUState *cs, gdb_syscall_complete_cb complete,
GuestFD *gf, target_ulong buf, target_ulong len)
{
/*
* Bound length for 64-bit guests on 32-bit hosts, not overlowing ssize_t.
* Bound length for 64-bit guests on 32-bit hosts, not overflowing ssize_t.
* Note the Linux kernel does this with MAX_RW_COUNT, so it's not a bad
* idea to do this unconditionally.
*/

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@ -325,7 +325,7 @@ void icount_start_warp_timer(void)
* vCPU is sleeping and warp can't be started.
* It is probably a race condition: notification sent
* to vCPU was processed in advance and vCPU went to sleep.
* Therefore we have to wake it up for doing someting.
* Therefore we have to wake it up for doing something.
*/
if (replay_has_event()) {
qemu_clock_notify(QEMU_CLOCK_VIRTUAL);

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@ -22,7 +22,7 @@
* THE SOFTWARE.
*/
/*
* splitted out ioport related stuffs from vl.c.
* split out ioport related stuffs from vl.c.
*/
#include "qemu/osdep.h"