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sparc64: flush translations on mmu context change

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- two pairs of softmmu indexes bind softmmu tlb to cpu tlb in fault handlers
  using value of DMMU primary and secondary context registers, so we need to
  flush softmmu translations when context registers are changed

Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Igor V. Kovalenko 2010-05-22 14:52:40 +04:00 committed by Blue Swirl
parent 9fd1ae3a0e
commit 664a65b0db
1 changed files with 6 additions and 0 deletions
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6
target-sparc/op_helper.c
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@ -2959,9 +2959,15 @@ void helper_st_asi(target_ulong addr, target_ulong val, int asi, int size)
break;
case 1: // Primary context
env->dmmu.mmu_primary_context = val;
/* can be optimized to only flush MMU_USER_IDX
and MMU_KERNEL_IDX entries */
tlb_flush(env, 1);
break;
case 2: // Secondary context
env->dmmu.mmu_secondary_context = val;
/* can be optimized to only flush MMU_USER_SECONDARY_IDX
and MMU_KERNEL_SECONDARY_IDX entries */
tlb_flush(env, 1);
break;
case 5: // TSB access
DPRINTF_MMU("dmmu TSB write: 0x%016" PRIx64 " -> 0x%016"