lsi: print register names in debug prints
Modify lsi_reg_readb function to have a single exit point. Debug print can now contain the returned value. Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Message-Id: <1471505489-1221-2-git-send-email-hpoussin@reactos.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
This commit is contained in:
Hervé Poussineau
Paolo Bonzini
parent
dc0a3e448c
commit
64eb7491d3
@ -34,6 +34,23 @@ do { fprintf(stderr, "lsi_scsi: error: " fmt , ## __VA_ARGS__); exit(1);} while
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do { fprintf(stderr, "lsi_scsi: error: " fmt , ## __VA_ARGS__);} while (0)
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#endif
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#ifdef DEBUG_LSI_REG
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static const char *names[] = {
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"SCNTL0", "SCNTL1", "SCNTL2", "SCNTL3", "SCID", "SXFER", "SDID", "GPREG",
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"SFBR", "SOCL", "SSID", "SBCL", "DSTAT", "SSTAT0", "SSTAT1", "SSTAT2",
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"DSA0", "DSA1", "DSA2", "DSA3", "ISTAT", "0x15", "0x16", "0x17",
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"CTEST0", "CTEST1", "CTEST2", "CTEST3", "TEMP0", "TEMP1", "TEMP2", "TEMP3",
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"DFIFO", "CTEST4", "CTEST5", "CTEST6", "DBC0", "DBC1", "DBC2", "DCMD",
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"DNAD0", "DNAD1", "DNAD2", "DNAD3", "DSP0", "DSP1", "DSP2", "DSP3",
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"DSPS0", "DSPS1", "DSPS2", "DSPS3", "SCRATCHA0", "SCRATCHA1", "SCRATCHA2", "SCRATCHA3",
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"DMODE", "DIEN", "SBR", "DCNTL", "ADDER0", "ADDER1", "ADDER2", "ADDER3",
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"SIEN0", "SIEN1", "SIST0", "SIST1", "SLPAR", "0x45", "MACNTL", "GPCNTL",
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"STIME0", "STIME1", "RESPID", "0x4b", "STEST0", "STEST1", "STEST2", "STEST3",
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"SIDL", "0x51", "0x52", "0x53", "SODL", "0x55", "0x56", "0x57",
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"SBDL", "0x59", "0x5a", "0x5b", "SCRATCHB0", "SCRATCHB1", "SCRATCHB2", "SCRATCHB3",
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};
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#endif
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#define LSI_MAX_DEVS 7
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#define LSI_SCNTL0_TRG 0x01
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@ -1480,155 +1497,200 @@ again:
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static uint8_t lsi_reg_readb(LSIState *s, int offset)
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{
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uint8_t tmp;
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uint8_t ret;
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#define CASE_GET_REG24(name, addr) \
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case addr: return s->name & 0xff; \
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case addr + 1: return (s->name >> 8) & 0xff; \
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case addr + 2: return (s->name >> 16) & 0xff;
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case addr: ret = s->name & 0xff; break; \
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case addr + 1: ret = (s->name >> 8) & 0xff; break; \
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case addr + 2: ret = (s->name >> 16) & 0xff; break;
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#define CASE_GET_REG32(name, addr) \
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case addr: return s->name & 0xff; \
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case addr + 1: return (s->name >> 8) & 0xff; \
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case addr + 2: return (s->name >> 16) & 0xff; \
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case addr + 3: return (s->name >> 24) & 0xff;
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case addr: ret = s->name & 0xff; break; \
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case addr + 1: ret = (s->name >> 8) & 0xff; break; \
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case addr + 2: ret = (s->name >> 16) & 0xff; break; \
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case addr + 3: ret = (s->name >> 24) & 0xff; break;
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#ifdef DEBUG_LSI_REG
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DPRINTF("Read reg %x\n", offset);
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#endif
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switch (offset) {
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case 0x00: /* SCNTL0 */
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return s->scntl0;
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ret = s->scntl0;
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break;
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case 0x01: /* SCNTL1 */
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return s->scntl1;
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ret = s->scntl1;
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break;
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case 0x02: /* SCNTL2 */
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return s->scntl2;
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ret = s->scntl2;
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break;
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case 0x03: /* SCNTL3 */
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return s->scntl3;
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ret = s->scntl3;
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break;
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case 0x04: /* SCID */
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return s->scid;
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ret = s->scid;
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break;
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case 0x05: /* SXFER */
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return s->sxfer;
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ret = s->sxfer;
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break;
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case 0x06: /* SDID */
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return s->sdid;
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ret = s->sdid;
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break;
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case 0x07: /* GPREG0 */
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return 0x7f;
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ret = 0x7f;
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break;
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case 0x08: /* Revision ID */
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return 0x00;
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ret = 0x00;
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break;
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case 0x09: /* SOCL */
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return s->socl;
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ret = s->socl;
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break;
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case 0xa: /* SSID */
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return s->ssid;
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ret = s->ssid;
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break;
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case 0xb: /* SBCL */
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/* ??? This is not correct. However it's (hopefully) only
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used for diagnostics, so should be ok. */
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return 0;
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ret = 0;
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break;
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case 0xc: /* DSTAT */
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tmp = s->dstat | LSI_DSTAT_DFE;
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ret = s->dstat | LSI_DSTAT_DFE;
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if ((s->istat0 & LSI_ISTAT0_INTF) == 0)
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s->dstat = 0;
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lsi_update_irq(s);
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return tmp;
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break;
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case 0x0d: /* SSTAT0 */
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return s->sstat0;
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ret = s->sstat0;
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break;
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case 0x0e: /* SSTAT1 */
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return s->sstat1;
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ret = s->sstat1;
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break;
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case 0x0f: /* SSTAT2 */
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return s->scntl1 & LSI_SCNTL1_CON ? 0 : 2;
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ret = s->scntl1 & LSI_SCNTL1_CON ? 0 : 2;
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break;
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CASE_GET_REG32(dsa, 0x10)
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case 0x14: /* ISTAT0 */
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return s->istat0;
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ret = s->istat0;
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break;
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case 0x15: /* ISTAT1 */
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return s->istat1;
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ret = s->istat1;
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break;
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case 0x16: /* MBOX0 */
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return s->mbox0;
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ret = s->mbox0;
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break;
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case 0x17: /* MBOX1 */
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return s->mbox1;
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ret = s->mbox1;
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break;
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case 0x18: /* CTEST0 */
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return 0xff;
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ret = 0xff;
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break;
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case 0x19: /* CTEST1 */
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return 0;
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ret = 0;
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break;
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case 0x1a: /* CTEST2 */
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tmp = s->ctest2 | LSI_CTEST2_DACK | LSI_CTEST2_CM;
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ret = s->ctest2 | LSI_CTEST2_DACK | LSI_CTEST2_CM;
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if (s->istat0 & LSI_ISTAT0_SIGP) {
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s->istat0 &= ~LSI_ISTAT0_SIGP;
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tmp |= LSI_CTEST2_SIGP;
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ret |= LSI_CTEST2_SIGP;
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}
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return tmp;
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break;
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case 0x1b: /* CTEST3 */
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return s->ctest3;
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ret = s->ctest3;
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break;
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CASE_GET_REG32(temp, 0x1c)
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case 0x20: /* DFIFO */
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return 0;
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ret = 0;
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break;
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case 0x21: /* CTEST4 */
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return s->ctest4;
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ret = s->ctest4;
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break;
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case 0x22: /* CTEST5 */
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return s->ctest5;
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ret = s->ctest5;
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break;
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case 0x23: /* CTEST6 */
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return 0;
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ret = 0;
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break;
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CASE_GET_REG24(dbc, 0x24)
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case 0x27: /* DCMD */
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return s->dcmd;
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ret = s->dcmd;
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break;
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CASE_GET_REG32(dnad, 0x28)
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CASE_GET_REG32(dsp, 0x2c)
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CASE_GET_REG32(dsps, 0x30)
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CASE_GET_REG32(scratch[0], 0x34)
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case 0x38: /* DMODE */
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return s->dmode;
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ret = s->dmode;
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break;
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case 0x39: /* DIEN */
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return s->dien;
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ret = s->dien;
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break;
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case 0x3a: /* SBR */
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return s->sbr;
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ret = s->sbr;
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break;
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case 0x3b: /* DCNTL */
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return s->dcntl;
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ret = s->dcntl;
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break;
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/* ADDER Output (Debug of relative jump address) */
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CASE_GET_REG32(adder, 0x3c)
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case 0x40: /* SIEN0 */
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return s->sien0;
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ret = s->sien0;
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break;
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case 0x41: /* SIEN1 */
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return s->sien1;
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ret = s->sien1;
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break;
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case 0x42: /* SIST0 */
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tmp = s->sist0;
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ret = s->sist0;
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s->sist0 = 0;
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lsi_update_irq(s);
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return tmp;
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break;
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case 0x43: /* SIST1 */
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tmp = s->sist1;
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ret = s->sist1;
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s->sist1 = 0;
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lsi_update_irq(s);
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return tmp;
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break;
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case 0x46: /* MACNTL */
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return 0x0f;
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ret = 0x0f;
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break;
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case 0x47: /* GPCNTL0 */
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return 0x0f;
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ret = 0x0f;
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break;
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case 0x48: /* STIME0 */
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return s->stime0;
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ret = s->stime0;
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break;
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case 0x4a: /* RESPID0 */
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return s->respid0;
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ret = s->respid0;
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break;
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case 0x4b: /* RESPID1 */
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return s->respid1;
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ret = s->respid1;
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break;
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case 0x4d: /* STEST1 */
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return s->stest1;
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ret = s->stest1;
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break;
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case 0x4e: /* STEST2 */
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return s->stest2;
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ret = s->stest2;
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break;
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case 0x4f: /* STEST3 */
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return s->stest3;
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ret = s->stest3;
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break;
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case 0x50: /* SIDL */
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/* This is needed by the linux drivers. We currently only update it
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during the MSG IN phase. */
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return s->sidl;
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ret = s->sidl;
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break;
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case 0x52: /* STEST4 */
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return 0xe0;
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ret = 0xe0;
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break;
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case 0x56: /* CCNTL0 */
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return s->ccntl0;
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ret = s->ccntl0;
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break;
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case 0x57: /* CCNTL1 */
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return s->ccntl1;
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ret = s->ccntl1;
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break;
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case 0x58: /* SBDL */
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/* Some drivers peek at the data bus during the MSG IN phase. */
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if ((s->sstat1 & PHASE_MASK) == PHASE_MI)
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return s->msg[0];
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return 0;
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ret = 0;
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break;
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case 0x59: /* SBDL high */
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return 0;
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ret = 0;
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break;
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CASE_GET_REG32(mmrs, 0xa0)
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CASE_GET_REG32(mmws, 0xa4)
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CASE_GET_REG32(sfs, 0xa8)
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@ -1643,18 +1705,28 @@ static uint8_t lsi_reg_readb(LSIState *s, int offset)
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CASE_GET_REG32(ia, 0xd4)
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CASE_GET_REG32(sbc, 0xd8)
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CASE_GET_REG32(csbc, 0xdc)
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}
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if (offset >= 0x5c && offset < 0xa0) {
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case 0x5c ... 0x9f:
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{
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int n;
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int shift;
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n = (offset - 0x58) >> 2;
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shift = (offset & 3) * 8;
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return (s->scratch[n] >> shift) & 0xff;
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ret = (s->scratch[n] >> shift) & 0xff;
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break;
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}
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default:
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BADF("readb 0x%x\n", offset);
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exit(1);
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}
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BADF("readb 0x%x\n", offset);
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exit(1);
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#undef CASE_GET_REG24
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#undef CASE_GET_REG32
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#ifdef DEBUG_LSI_REG
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DPRINTF("Read reg %s %x = %02x\n",
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offset < ARRAY_SIZE(names) ? names[offset] : "???", offset, ret);
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#endif
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return ret;
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}
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static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val)
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@ -1671,7 +1743,8 @@ static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val)
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case addr + 3: s->name &= 0x00ffffff; s->name |= val << 24; break;
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#ifdef DEBUG_LSI_REG
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DPRINTF("Write reg %x = %02x\n", offset, val);
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DPRINTF("Write reg %s %x = %02x\n",
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offset < ARRAY_SIZE(names) ? names[offset] : "???", offset, val);
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#endif
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switch (offset) {
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case 0x00: /* SCNTL0 */
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