Handle IBE on MIPS properly.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3416 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -608,7 +608,7 @@ static inline target_ulong get_phys_addr_code(CPUState *env, target_ulong addr)
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}
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}
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pd = env->tlb_table[mmu_idx][index].addr_code & ~TARGET_PAGE_MASK;
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pd = env->tlb_table[mmu_idx][index].addr_code & ~TARGET_PAGE_MASK;
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if (pd > IO_MEM_ROM && !(pd & IO_MEM_ROMD)) {
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if (pd > IO_MEM_ROM && !(pd & IO_MEM_ROMD)) {
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#ifdef TARGET_SPARC
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#if defined(TARGET_SPARC) || defined(TARGET_MIPS)
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do_unassigned_access(addr, 0, 1, 0);
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do_unassigned_access(addr, 0, 1, 0);
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#else
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#else
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cpu_abort(env, "Trying to execute code outside RAM or ROM at 0x" TARGET_FMT_lx "\n", addr);
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cpu_abort(env, "Trying to execute code outside RAM or ROM at 0x" TARGET_FMT_lx "\n", addr);
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@ -479,6 +479,9 @@ int mips_find_by_name (const unsigned char *name, mips_def_t **def);
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void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
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void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
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int cpu_mips_register (CPUMIPSState *env, mips_def_t *def);
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int cpu_mips_register (CPUMIPSState *env, mips_def_t *def);
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void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
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int unused);
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#define CPUState CPUMIPSState
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#define CPUState CPUMIPSState
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#define cpu_init cpu_mips_init
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#define cpu_init cpu_mips_init
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#define cpu_exec cpu_mips_exec
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#define cpu_exec cpu_mips_exec
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@ -591,6 +591,14 @@ void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr)
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env = saved_env;
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env = saved_env;
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}
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}
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void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
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int unused)
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{
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if (is_exec)
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do_raise_exception(EXCP_IBE);
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else
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do_raise_exception(EXCP_DBE);
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}
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#endif
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#endif
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/* Complex FPU operations which may need stack space. */
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/* Complex FPU operations which may need stack space. */
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