target/arm: Fix MemOp for STGP
When converting to decodetree, the code to rebuild mop for the pair
only made it into trans_STP and not into trans_STGP.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1790
Fixes: 8c212eb659
("target/arm: Convert load/store-pair to decodetree")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230726165416.309624-1-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -3004,6 +3004,9 @@ static bool trans_STGP(DisasContext *s, arg_ldstpair *a)
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MemOp mop;
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TCGv_i128 tmp;
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/* STGP only comes in one size. */
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tcg_debug_assert(a->sz == MO_64);
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if (!dc_isar_feature(aa64_mte_insn_reg, s)) {
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return false;
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}
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@ -3029,13 +3032,25 @@ static bool trans_STGP(DisasContext *s, arg_ldstpair *a)
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gen_helper_stg(cpu_env, dirty_addr, dirty_addr);
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}
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mop = finalize_memop(s, a->sz);
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clean_addr = gen_mte_checkN(s, dirty_addr, true, false, 2 << a->sz, mop);
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mop = finalize_memop(s, MO_64);
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clean_addr = gen_mte_checkN(s, dirty_addr, true, false, 2 << MO_64, mop);
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tcg_rt = cpu_reg(s, a->rt);
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tcg_rt2 = cpu_reg(s, a->rt2);
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assert(a->sz == 3);
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/*
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* STGP is defined as two 8-byte memory operations and one tag operation.
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* We implement it as one single 16-byte memory operation for convenience.
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* Rebuild mop as for STP.
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* TODO: The atomicity with LSE2 is stronger than required.
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* Need a form of MO_ATOM_WITHIN16_PAIR that never requires
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* 16-byte atomicity.
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*/
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mop = MO_128;
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if (s->align_mem) {
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mop |= MO_ALIGN_8;
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}
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mop = finalize_memop_pair(s, mop);
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tmp = tcg_temp_new_i128();
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if (s->be_data == MO_LE) {
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