xilinx_spips: Separate the state struct into a header
Separate out the XilinxSPIPS struct into a separate header file. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Alistair Francis
Peter Maydell
parent
8fd06719e7
commit
6363235b2b
@ -29,6 +29,7 @@
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#include "qemu/fifo8.h"
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#include "hw/ssi/ssi.h"
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#include "qemu/bitops.h"
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#include "hw/ssi/xilinx_spips.h"
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#ifndef XILINX_SPIPS_ERR_DEBUG
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#define XILINX_SPIPS_ERR_DEBUG 0
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@ -103,8 +104,6 @@
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#define R_MOD_ID (0xFC / 4)
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#define R_MAX (R_MOD_ID+1)
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/* size of TXRX FIFOs */
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#define RXFF_A 32
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#define TXFF_A 32
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@ -134,30 +133,6 @@ typedef enum {
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QPP = 0x32,
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} FlashCMD;
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typedef struct {
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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MemoryRegion mmlqspi;
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qemu_irq irq;
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int irqline;
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uint8_t num_cs;
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uint8_t num_busses;
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uint8_t snoop_state;
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qemu_irq *cs_lines;
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SSIBus **spi;
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Fifo8 rx_fifo;
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Fifo8 tx_fifo;
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uint8_t num_txrx_bytes;
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uint32_t regs[R_MAX];
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} XilinxSPIPS;
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typedef struct {
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XilinxSPIPS parent_obj;
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@ -174,19 +149,6 @@ typedef struct XilinxSPIPSClass {
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uint32_t tx_fifo_size;
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} XilinxSPIPSClass;
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#define TYPE_XILINX_SPIPS "xlnx.ps7-spi"
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#define TYPE_XILINX_QSPIPS "xlnx.ps7-qspi"
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#define XILINX_SPIPS(obj) \
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OBJECT_CHECK(XilinxSPIPS, (obj), TYPE_XILINX_SPIPS)
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#define XILINX_SPIPS_CLASS(klass) \
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OBJECT_CLASS_CHECK(XilinxSPIPSClass, (klass), TYPE_XILINX_SPIPS)
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#define XILINX_SPIPS_GET_CLASS(obj) \
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OBJECT_GET_CLASS(XilinxSPIPSClass, (obj), TYPE_XILINX_SPIPS)
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#define XILINX_QSPIPS(obj) \
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OBJECT_CHECK(XilinxQSPIPS, (obj), TYPE_XILINX_QSPIPS)
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static inline int num_effective_busses(XilinxSPIPS *s)
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{
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return (s->regs[R_LQSPI_CFG] & LQSPI_CFG_SEP_BUS &&
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@ -257,7 +219,7 @@ static void xilinx_spips_reset(DeviceState *d)
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XilinxSPIPS *s = XILINX_SPIPS(d);
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int i;
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for (i = 0; i < R_MAX; i++) {
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for (i = 0; i < XLNX_SPIPS_R_MAX; i++) {
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s->regs[i] = 0;
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}
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@ -664,7 +626,7 @@ static void xilinx_spips_realize(DeviceState *dev, Error **errp)
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}
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memory_region_init_io(&s->iomem, OBJECT(s), xsc->reg_ops, s,
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"spi", R_MAX*4);
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"spi", XLNX_SPIPS_R_MAX * 4);
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sysbus_init_mmio(sbd, &s->iomem);
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s->irqline = -1;
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@ -708,7 +670,7 @@ static const VMStateDescription vmstate_xilinx_spips = {
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.fields = (VMStateField[]) {
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VMSTATE_FIFO8(tx_fifo, XilinxSPIPS),
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VMSTATE_FIFO8(rx_fifo, XilinxSPIPS),
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VMSTATE_UINT32_ARRAY(regs, XilinxSPIPS, R_MAX),
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VMSTATE_UINT32_ARRAY(regs, XilinxSPIPS, XLNX_SPIPS_R_MAX),
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VMSTATE_UINT8(snoop_state, XilinxSPIPS),
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VMSTATE_END_OF_LIST()
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}
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72
include/hw/ssi/xilinx_spips.h
Normal file
72
include/hw/ssi/xilinx_spips.h
Normal file
@ -0,0 +1,72 @@
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/*
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* Header file for the Xilinx Zynq SPI controller
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*
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* Copyright (C) 2015 Xilinx Inc
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef XLNX_SPIPS_H
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#define XLNX_SPIPS_H
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#include "hw/ssi/ssi.h"
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#include "qemu/fifo8.h"
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typedef struct XilinxSPIPS XilinxSPIPS;
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#define XLNX_SPIPS_R_MAX (0x100 / 4)
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struct XilinxSPIPS {
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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MemoryRegion mmlqspi;
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qemu_irq irq;
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int irqline;
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uint8_t num_cs;
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uint8_t num_busses;
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uint8_t snoop_state;
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qemu_irq *cs_lines;
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SSIBus **spi;
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Fifo8 rx_fifo;
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Fifo8 tx_fifo;
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uint8_t num_txrx_bytes;
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uint32_t regs[XLNX_SPIPS_R_MAX];
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};
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#define TYPE_XILINX_SPIPS "xlnx.ps7-spi"
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#define TYPE_XILINX_QSPIPS "xlnx.ps7-qspi"
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#define XILINX_SPIPS(obj) \
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OBJECT_CHECK(XilinxSPIPS, (obj), TYPE_XILINX_SPIPS)
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#define XILINX_SPIPS_CLASS(klass) \
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OBJECT_CLASS_CHECK(XilinxSPIPSClass, (klass), TYPE_XILINX_SPIPS)
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#define XILINX_SPIPS_GET_CLASS(obj) \
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OBJECT_GET_CLASS(XilinxSPIPSClass, (obj), TYPE_XILINX_SPIPS)
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#define XILINX_QSPIPS(obj) \
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OBJECT_CHECK(XilinxQSPIPS, (obj), TYPE_XILINX_QSPIPS)
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#endif /* XLNX_SPIPS_H */
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