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target/mips: Don't use tcg_temp_local_new

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Since tcg_temp_new is now identical, use that.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-01-29 14:44:25 -10:00
parent 3a5d177322
commit 6180cc4027
2 changed files with 16 additions and 45 deletions
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4
target/mips/tcg/nanomips_translate.c.inc
View File

@ -1017,8 +1017,8 @@ static void gen_llwp(DisasContext *ctx, uint32_t base, int16_t offset,
static void gen_scwp(DisasContext *ctx, uint32_t base, int16_t offset, static void gen_scwp(DisasContext *ctx, uint32_t base, int16_t offset,
uint32_t reg1, uint32_t reg2, bool eva) uint32_t reg1, uint32_t reg2, bool eva)
{ {
TCGv taddr = tcg_temp_local_new(); TCGv taddr = tcg_temp_new();
TCGv lladdr = tcg_temp_local_new(); TCGv lladdr = tcg_temp_new();
TCGv_i64 tval = tcg_temp_new_i64(); TCGv_i64 tval = tcg_temp_new_i64();
TCGv_i64 llval = tcg_temp_new_i64(); TCGv_i64 llval = tcg_temp_new_i64();
TCGv_i64 val = tcg_temp_new_i64(); TCGv_i64 val = tcg_temp_new_i64();

51
target/mips/tcg/translate.c
View File

@ -2400,7 +2400,7 @@ static void gen_arith_imm(DisasContext *ctx, uint32_t opc,
switch (opc) { switch (opc) {
case OPC_ADDI: case OPC_ADDI:
{ {
TCGv t0 = tcg_temp_local_new(); TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new(); TCGv t1 = tcg_temp_new();
TCGv t2 = tcg_temp_new(); TCGv t2 = tcg_temp_new();
TCGLabel *l1 = gen_new_label(); TCGLabel *l1 = gen_new_label();
@ -2434,7 +2434,7 @@ static void gen_arith_imm(DisasContext *ctx, uint32_t opc,
#if defined(TARGET_MIPS64) #if defined(TARGET_MIPS64)
case OPC_DADDI: case OPC_DADDI:
{ {
TCGv t0 = tcg_temp_local_new(); TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new(); TCGv t1 = tcg_temp_new();
TCGv t2 = tcg_temp_new(); TCGv t2 = tcg_temp_new();
TCGLabel *l1 = gen_new_label(); TCGLabel *l1 = gen_new_label();
@ -2630,7 +2630,7 @@ static void gen_arith(DisasContext *ctx, uint32_t opc,
switch (opc) { switch (opc) {
case OPC_ADD: case OPC_ADD:
{ {
TCGv t0 = tcg_temp_local_new(); TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new(); TCGv t1 = tcg_temp_new();
TCGv t2 = tcg_temp_new(); TCGv t2 = tcg_temp_new();
TCGLabel *l1 = gen_new_label(); TCGLabel *l1 = gen_new_label();
@ -2666,7 +2666,7 @@ static void gen_arith(DisasContext *ctx, uint32_t opc,
break; break;
case OPC_SUB: case OPC_SUB:
{ {
TCGv t0 = tcg_temp_local_new(); TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new(); TCGv t1 = tcg_temp_new();
TCGv t2 = tcg_temp_new(); TCGv t2 = tcg_temp_new();
TCGLabel *l1 = gen_new_label(); TCGLabel *l1 = gen_new_label();
@ -2707,7 +2707,7 @@ static void gen_arith(DisasContext *ctx, uint32_t opc,
#if defined(TARGET_MIPS64) #if defined(TARGET_MIPS64)
case OPC_DADD: case OPC_DADD:
{ {
TCGv t0 = tcg_temp_local_new(); TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new(); TCGv t1 = tcg_temp_new();
TCGv t2 = tcg_temp_new(); TCGv t2 = tcg_temp_new();
TCGLabel *l1 = gen_new_label(); TCGLabel *l1 = gen_new_label();
@ -2741,7 +2741,7 @@ static void gen_arith(DisasContext *ctx, uint32_t opc,
break; break;
case OPC_DSUB: case OPC_DSUB:
{ {
TCGv t0 = tcg_temp_local_new(); TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new(); TCGv t1 = tcg_temp_new();
TCGv t2 = tcg_temp_new(); TCGv t2 = tcg_temp_new();
TCGLabel *l1 = gen_new_label(); TCGLabel *l1 = gen_new_label();
@ -3759,26 +3759,8 @@ static void gen_loongson_integer(DisasContext *ctx, uint32_t opc,
return; return;
} }
switch (opc) {
case OPC_MULT_G_2E:
case OPC_MULT_G_2F:
case OPC_MULTU_G_2E:
case OPC_MULTU_G_2F:
#if defined(TARGET_MIPS64)
case OPC_DMULT_G_2E:
case OPC_DMULT_G_2F:
case OPC_DMULTU_G_2E:
case OPC_DMULTU_G_2F:
#endif
t0 = tcg_temp_new(); t0 = tcg_temp_new();
t1 = tcg_temp_new(); t1 = tcg_temp_new();
break;
default:
t0 = tcg_temp_local_new();
t1 = tcg_temp_local_new();
break;
}
gen_load_gpr(t0, rs); gen_load_gpr(t0, rs);
gen_load_gpr(t1, rt); gen_load_gpr(t1, rt);
@ -3955,21 +3937,10 @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
TCGCond cond; TCGCond cond;
opc = MASK_LMMI(ctx->opcode); opc = MASK_LMMI(ctx->opcode);
switch (opc) { check_cp1_enabled(ctx);
case OPC_ADD_CP2:
case OPC_SUB_CP2:
case OPC_DADD_CP2:
case OPC_DSUB_CP2:
t0 = tcg_temp_local_new_i64();
t1 = tcg_temp_local_new_i64();
break;
default:
t0 = tcg_temp_new_i64(); t0 = tcg_temp_new_i64();
t1 = tcg_temp_new_i64(); t1 = tcg_temp_new_i64();
break;
}
check_cp1_enabled(ctx);
gen_load_fpr64(ctx, t0, rs); gen_load_fpr64(ctx, t0, rs);
gen_load_fpr64(ctx, t1, rt); gen_load_fpr64(ctx, t1, rt);
@ -8650,7 +8621,7 @@ static void gen_mftr(CPUMIPSState *env, DisasContext *ctx, int rt, int rd,
int u, int sel, int h) int u, int sel, int h)
{ {
int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
TCGv t0 = tcg_temp_local_new(); TCGv t0 = tcg_temp_new();
if ((env->CP0_VPEConf0 & (1 << CP0VPEC0_MVP)) == 0 && if ((env->CP0_VPEConf0 & (1 << CP0VPEC0_MVP)) == 0 &&
((env->tcs[other_tc].CP0_TCBind & (0xf << CP0TCBd_CurVPE)) != ((env->tcs[other_tc].CP0_TCBind & (0xf << CP0TCBd_CurVPE)) !=
@ -8878,7 +8849,7 @@ static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt,
int u, int sel, int h) int u, int sel, int h)
{ {
int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
TCGv t0 = tcg_temp_local_new(); TCGv t0 = tcg_temp_new();
gen_load_gpr(t0, rt); gen_load_gpr(t0, rt);
if ((env->CP0_VPEConf0 & (1 << CP0VPEC0_MVP)) == 0 && if ((env->CP0_VPEConf0 & (1 << CP0VPEC0_MVP)) == 0 &&
@ -11409,7 +11380,7 @@ static void gen_flt3_arith(DisasContext *ctx, uint32_t opc,
case OPC_ALNV_PS: case OPC_ALNV_PS:
check_ps(ctx); check_ps(ctx);
{ {
TCGv t0 = tcg_temp_local_new(); TCGv t0 = tcg_temp_new();
TCGv_i32 fp = tcg_temp_new_i32(); TCGv_i32 fp = tcg_temp_new_i32();
TCGv_i32 fph = tcg_temp_new_i32(); TCGv_i32 fph = tcg_temp_new_i32();
TCGLabel *l1 = gen_new_label(); TCGLabel *l1 = gen_new_label();