m68k: improve comments on m68k_move_to/from helpers
Add more detailed comments to each case of m68k_move_to/from helpers to list the supported CPUs for that CR as they were wrong in some cases, and missing some cpu classes in other cases. Signed-off-by: Lucien Murray-Pitts <lucienmp.qemu@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <a8bd70b66e3dbdb7d2ab7a852af71cdbf341d50c.1612137712.git.balaton@eik.bme.hu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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@ -187,13 +187,15 @@ void HELPER(cf_movec_to)(CPUM68KState *env, uint32_t reg, uint32_t val)
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void HELPER(m68k_movec_to)(CPUM68KState *env, uint32_t reg, uint32_t val)
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{
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switch (reg) {
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/* MC680[1234]0 */
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/* MC680[12346]0 */
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case M68K_CR_SFC:
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env->sfc = val & 7;
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return;
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/* MC680[12346]0 */
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case M68K_CR_DFC:
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env->dfc = val & 7;
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return;
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/* MC680[12346]0 */
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case M68K_CR_VBR:
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env->vbr = val;
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return;
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@ -210,25 +212,30 @@ void HELPER(m68k_movec_to)(CPUM68KState *env, uint32_t reg, uint32_t val)
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}
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m68k_switch_sp(env);
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return;
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/* MC680[34]0 */
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/* MC680[46]0 */
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case M68K_CR_TC:
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env->mmu.tcr = val;
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return;
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/* MC68040 */
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case M68K_CR_MMUSR:
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env->mmu.mmusr = val;
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return;
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/* MC680[46]0 */
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case M68K_CR_SRP:
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env->mmu.srp = val;
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return;
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case M68K_CR_URP:
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env->mmu.urp = val;
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return;
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/* MC680[46]0 */
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case M68K_CR_USP:
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env->sp[M68K_USP] = val;
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return;
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/* MC680[234]0 */
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case M68K_CR_MSP:
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env->sp[M68K_SSP] = val;
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return;
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/* MC680[234]0 */
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case M68K_CR_ISP:
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env->sp[M68K_ISP] = val;
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return;
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@ -236,12 +243,15 @@ void HELPER(m68k_movec_to)(CPUM68KState *env, uint32_t reg, uint32_t val)
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case M68K_CR_ITT0:
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env->mmu.ttr[M68K_ITTR0] = val;
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return;
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/* MC68040/MC68LC040 */
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case M68K_CR_ITT1:
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env->mmu.ttr[M68K_ITTR1] = val;
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return;
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/* MC68040/MC68LC040 */
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case M68K_CR_DTT0:
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env->mmu.ttr[M68K_DTTR0] = val;
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return;
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/* MC68040/MC68LC040 */
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case M68K_CR_DTT1:
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env->mmu.ttr[M68K_DTTR1] = val;
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return;
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@ -254,39 +264,50 @@ void HELPER(m68k_movec_to)(CPUM68KState *env, uint32_t reg, uint32_t val)
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uint32_t HELPER(m68k_movec_from)(CPUM68KState *env, uint32_t reg)
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{
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switch (reg) {
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/* MC680[1234]0 */
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/* MC680[12346]0 */
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case M68K_CR_SFC:
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return env->sfc;
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/* MC680[12346]0 */
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case M68K_CR_DFC:
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return env->dfc;
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/* MC680[12346]0 */
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case M68K_CR_VBR:
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return env->vbr;
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/* MC680[234]0 */
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/* MC680[2346]0 */
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case M68K_CR_CACR:
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return env->cacr;
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/* MC680[34]0 */
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/* MC680[46]0 */
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case M68K_CR_TC:
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return env->mmu.tcr;
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/* MC68040 */
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case M68K_CR_MMUSR:
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return env->mmu.mmusr;
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/* MC680[46]0 */
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case M68K_CR_SRP:
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return env->mmu.srp;
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/* MC680[46]0 */
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case M68K_CR_USP:
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return env->sp[M68K_USP];
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/* MC680[234]0 */
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case M68K_CR_MSP:
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return env->sp[M68K_SSP];
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/* MC680[234]0 */
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case M68K_CR_ISP:
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return env->sp[M68K_ISP];
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/* MC68040/MC68LC040 */
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case M68K_CR_URP:
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return env->mmu.urp;
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case M68K_CR_ITT0:
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/* MC68040/MC68LC040 */
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case M68K_CR_ITT0: /* MC68EC040 only: M68K_CR_IACR0 */
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return env->mmu.ttr[M68K_ITTR0];
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case M68K_CR_ITT1:
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/* MC68040/MC68LC040 */
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case M68K_CR_ITT1: /* MC68EC040 only: M68K_CR_IACR1 */
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return env->mmu.ttr[M68K_ITTR1];
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case M68K_CR_DTT0:
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/* MC68040/MC68LC040 */
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case M68K_CR_DTT0: /* MC68EC040 only: M68K_CR_DACR0 */
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return env->mmu.ttr[M68K_DTTR0];
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case M68K_CR_DTT1:
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/* MC68040/MC68LC040 */
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case M68K_CR_DTT1: /* MC68EC040 only: M68K_CR_DACR1 */
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return env->mmu.ttr[M68K_DTTR1];
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}
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cpu_abort(env_cpu(env), "Unimplemented control register read 0x%x\n",
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