tests/qtest/bios-tables-test.c: Enable numamem testing for RISC-V

Add ACPI SRAT table test case for RISC-V when NUMA was enabled.

Signed-off-by: Haibo Xu <haibo1.xu@intel.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <a6f7e1a4b20ff7eb199e94ca0c8aa2e6794ce5b2.1723172696.git.haibo1.xu@intel.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Haibo Xu 2024-08-09 11:09:48 +08:00 committed by Alistair Francis
parent 761a9c5820
commit 5fd9c51dc0

View File

@ -1706,6 +1706,32 @@ static void test_acpi_microvm_ioapic2_tcg(void)
free_test_data(&data);
}
static void test_acpi_riscv64_virt_tcg_numamem(void)
{
test_data data = {
.machine = "virt",
.arch = "riscv64",
.tcg_only = true,
.uefi_fl1 = "pc-bios/edk2-riscv-code.fd",
.uefi_fl2 = "pc-bios/edk2-riscv-vars.fd",
.cd = "tests/data/uefi-boot-images/bios-tables-test.riscv64.iso.qcow2",
.ram_start = 0x80000000ULL,
.scan_len = 128ULL * 1024 * 1024,
};
data.variant = ".numamem";
/*
* RHCT will have ISA string encoded. To reduce the effort
* of updating expected AML file for any new default ISA extension,
* use the profile rva22s64.
*/
test_acpi_one(" -cpu rva22s64"
" -object memory-backend-ram,id=ram0,size=128M"
" -numa node,memdev=ram0",
&data);
free_test_data(&data);
}
static void test_acpi_aarch64_virt_tcg_numamem(void)
{
test_data data = {
@ -2466,6 +2492,8 @@ int main(int argc, char *argv[])
} else if (strcmp(arch, "riscv64") == 0) {
if (has_tcg && qtest_has_device("virtio-blk-pci")) {
qtest_add_func("acpi/virt", test_acpi_riscv64_virt_tcg);
qtest_add_func("acpi/virt/numamem",
test_acpi_riscv64_virt_tcg_numamem);
}
}
ret = g_test_run();