tests/qtest/bios-tables-test.c: Enable numamem testing for RISC-V
Add ACPI SRAT table test case for RISC-V when NUMA was enabled. Signed-off-by: Haibo Xu <haibo1.xu@intel.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <a6f7e1a4b20ff7eb199e94ca0c8aa2e6794ce5b2.1723172696.git.haibo1.xu@intel.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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@ -1706,6 +1706,32 @@ static void test_acpi_microvm_ioapic2_tcg(void)
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free_test_data(&data);
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}
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static void test_acpi_riscv64_virt_tcg_numamem(void)
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{
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test_data data = {
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.machine = "virt",
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.arch = "riscv64",
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.tcg_only = true,
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.uefi_fl1 = "pc-bios/edk2-riscv-code.fd",
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.uefi_fl2 = "pc-bios/edk2-riscv-vars.fd",
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.cd = "tests/data/uefi-boot-images/bios-tables-test.riscv64.iso.qcow2",
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.ram_start = 0x80000000ULL,
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.scan_len = 128ULL * 1024 * 1024,
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};
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data.variant = ".numamem";
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/*
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* RHCT will have ISA string encoded. To reduce the effort
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* of updating expected AML file for any new default ISA extension,
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* use the profile rva22s64.
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*/
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test_acpi_one(" -cpu rva22s64"
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" -object memory-backend-ram,id=ram0,size=128M"
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" -numa node,memdev=ram0",
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&data);
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free_test_data(&data);
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}
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static void test_acpi_aarch64_virt_tcg_numamem(void)
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{
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test_data data = {
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@ -2466,6 +2492,8 @@ int main(int argc, char *argv[])
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} else if (strcmp(arch, "riscv64") == 0) {
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if (has_tcg && qtest_has_device("virtio-blk-pci")) {
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qtest_add_func("acpi/virt", test_acpi_riscv64_virt_tcg);
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qtest_add_func("acpi/virt/numamem",
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test_acpi_riscv64_virt_tcg_numamem);
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}
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}
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ret = g_test_run();
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