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omap: Use cpu_arm_init() to store ARMCPU in omap_mpu_state_s

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Fix tab indentations of comments, add braces, use cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Andreas Färber 2012-05-04 00:42:39 +02:00
parent 43824588af
commit 5f4ef08b20
6 changed files with 21 additions and 19 deletions
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6
hw/nseries.c
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@ -1023,7 +1023,7 @@ static void n8x0_boot_init(void *opaque)
n800_dss_init(&s->blizzard); n800_dss_init(&s->blizzard);
/* CPU setup */ /* CPU setup */
s->cpu->env->GE = 0x5; s->cpu->cpu->env.GE = 0x5;
/* If the machine has a slided keyboard, open it */ /* If the machine has a slided keyboard, open it */
if (s->kbd) if (s->kbd)
@ -1329,7 +1329,7 @@ static void n8x0_init(ram_addr_t ram_size, const char *boot_device,
binfo->kernel_filename = kernel_filename; binfo->kernel_filename = kernel_filename;
binfo->kernel_cmdline = kernel_cmdline; binfo->kernel_cmdline = kernel_cmdline;
binfo->initrd_filename = initrd_filename; binfo->initrd_filename = initrd_filename;
arm_load_kernel(s->cpu->env, binfo); arm_load_kernel(&s->cpu->cpu->env, binfo);
qemu_register_reset(n8x0_boot_init, s); qemu_register_reset(n8x0_boot_init, s);
} }
@ -1338,7 +1338,7 @@ static void n8x0_init(ram_addr_t ram_size, const char *boot_device,
int rom_size; int rom_size;
uint8_t nolo_tags[0x10000]; uint8_t nolo_tags[0x10000];
/* No, wait, better start at the ROM. */ /* No, wait, better start at the ROM. */
s->cpu->env->regs[15] = OMAP2_Q2_BASE + 0x400000; s->cpu->cpu->env.regs[15] = OMAP2_Q2_BASE + 0x400000;
/* This is intended for loading the `secondary.bin' program from /* This is intended for loading the `secondary.bin' program from
* Nokia images (the NOLO bootloader). The entry point seems * Nokia images (the NOLO bootloader). The entry point seems

2
hw/omap.h
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@ -804,7 +804,7 @@ struct omap_mpu_state_s {
omap3630, omap3630,
} mpu_model; } mpu_model;
CPUARMState *env; ARMCPU *cpu;
qemu_irq *drq; qemu_irq *drq;

20
hw/omap1.c
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@ -1519,8 +1519,9 @@ static inline void omap_clkm_idlect1_update(struct omap_mpu_state_s *s,
{ {
omap_clk clk; omap_clk clk;
if (value & (1 << 11)) /* SETARM_IDLE */ if (value & (1 << 11)) { /* SETARM_IDLE */
cpu_interrupt(s->env, CPU_INTERRUPT_HALT); cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_HALT);
}
if (!(value & (1 << 10))) /* WKUP_MODE */ if (!(value & (1 << 10))) /* WKUP_MODE */
qemu_system_shutdown_request(); /* XXX: disable wakeup from IRQ */ qemu_system_shutdown_request(); /* XXX: disable wakeup from IRQ */
@ -1734,7 +1735,7 @@ static uint64_t omap_clkdsp_read(void *opaque, target_phys_addr_t addr,
case 0x18: /* DSP_SYSST */ case 0x18: /* DSP_SYSST */
return (s->clkm.clocking_scheme << 11) | s->clkm.cold_start | return (s->clkm.clocking_scheme << 11) | s->clkm.cold_start |
(s->env->halted << 6); /* Quite useless... */ (s->cpu->env.halted << 6); /* Quite useless... */
} }
OMAP_BAD_REG(addr); OMAP_BAD_REG(addr);
@ -3701,7 +3702,7 @@ static void omap1_mpu_reset(void *opaque)
omap_lpg_reset(mpu->led[0]); omap_lpg_reset(mpu->led[0]);
omap_lpg_reset(mpu->led[1]); omap_lpg_reset(mpu->led[1]);
omap_clkm_reset(mpu); omap_clkm_reset(mpu);
cpu_state_reset(mpu->env); cpu_reset(CPU(mpu->cpu));
} }
static const struct omap_map_s { static const struct omap_map_s {
@ -3751,8 +3752,9 @@ void omap_mpu_wakeup(void *opaque, int irq, int req)
{ {
struct omap_mpu_state_s *mpu = (struct omap_mpu_state_s *) opaque; struct omap_mpu_state_s *mpu = (struct omap_mpu_state_s *) opaque;
if (mpu->env->halted) if (mpu->cpu->env.halted) {
cpu_interrupt(mpu->env, CPU_INTERRUPT_EXITTB); cpu_interrupt(&mpu->cpu->env, CPU_INTERRUPT_EXITTB);
}
} }
static const struct dma_irq_map omap1_dma_irq_map[] = { static const struct dma_irq_map omap1_dma_irq_map[] = {
@ -3829,8 +3831,8 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory,
/* Core */ /* Core */
s->mpu_model = omap310; s->mpu_model = omap310;
s->env = cpu_init(core); s->cpu = cpu_arm_init(core);
if (!s->env) { if (s->cpu == NULL) {
fprintf(stderr, "Unable to find CPU definition\n"); fprintf(stderr, "Unable to find CPU definition\n");
exit(1); exit(1);
} }
@ -3852,7 +3854,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory,
omap_clkm_init(system_memory, 0xfffece00, 0xe1008000, s); omap_clkm_init(system_memory, 0xfffece00, 0xe1008000, s);
cpu_irq = arm_pic_init_cpu(s->env); cpu_irq = arm_pic_init_cpu(&s->cpu->env);
s->ih[0] = qdev_create(NULL, "omap-intc"); s->ih[0] = qdev_create(NULL, "omap-intc");
qdev_prop_set_uint32(s->ih[0], "size", 0x100); qdev_prop_set_uint32(s->ih[0], "size", 0x100);
qdev_prop_set_ptr(s->ih[0], "clk", omap_findclk(s, "arminth_ck")); qdev_prop_set_ptr(s->ih[0], "clk", omap_findclk(s, "arminth_ck"));

8
hw/omap2.c
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@ -2222,7 +2222,7 @@ static void omap2_mpu_reset(void *opaque)
omap_mmc_reset(mpu->mmc); omap_mmc_reset(mpu->mmc);
omap_mcspi_reset(mpu->mcspi[0]); omap_mcspi_reset(mpu->mcspi[0]);
omap_mcspi_reset(mpu->mcspi[1]); omap_mcspi_reset(mpu->mcspi[1]);
cpu_state_reset(mpu->env); cpu_reset(CPU(mpu->cpu));
} }
static int omap2_validate_addr(struct omap_mpu_state_s *s, static int omap2_validate_addr(struct omap_mpu_state_s *s,
@ -2253,8 +2253,8 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem,
/* Core */ /* Core */
s->mpu_model = omap2420; s->mpu_model = omap2420;
s->env = cpu_init(core ?: "arm1136-r2"); s->cpu = cpu_arm_init(core ?: "arm1136-r2");
if (!s->env) { if (s->cpu == NULL) {
fprintf(stderr, "Unable to find CPU definition\n"); fprintf(stderr, "Unable to find CPU definition\n");
exit(1); exit(1);
} }
@ -2277,7 +2277,7 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem,
s->l4 = omap_l4_init(sysmem, OMAP2_L4_BASE, 54); s->l4 = omap_l4_init(sysmem, OMAP2_L4_BASE, 54);
/* Actually mapped at any 2K boundary in the ARM11 private-peripheral if */ /* Actually mapped at any 2K boundary in the ARM11 private-peripheral if */
cpu_irq = arm_pic_init_cpu(s->env); cpu_irq = arm_pic_init_cpu(&s->cpu->env);
s->ih[0] = qdev_create(NULL, "omap2-intc"); s->ih[0] = qdev_create(NULL, "omap2-intc");
qdev_prop_set_uint8(s->ih[0], "revision", 0x21); qdev_prop_set_uint8(s->ih[0], "revision", 0x21);
qdev_prop_set_ptr(s->ih[0], "fclk", omap_findclk(s, "mpu_intc_fclk")); qdev_prop_set_ptr(s->ih[0], "fclk", omap_findclk(s, "mpu_intc_fclk"));

2
hw/omap_sx1.c
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@ -202,7 +202,7 @@ static void sx1_init(ram_addr_t ram_size,
sx1_binfo.kernel_filename = kernel_filename; sx1_binfo.kernel_filename = kernel_filename;
sx1_binfo.kernel_cmdline = kernel_cmdline; sx1_binfo.kernel_cmdline = kernel_cmdline;
sx1_binfo.initrd_filename = initrd_filename; sx1_binfo.initrd_filename = initrd_filename;
arm_load_kernel(cpu->env, &sx1_binfo); arm_load_kernel(&cpu->cpu->env, &sx1_binfo);
} }
/* TODO: fix next line */ /* TODO: fix next line */

2
hw/palm.c
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@ -265,7 +265,7 @@ static void palmte_init(ram_addr_t ram_size,
palmte_binfo.kernel_filename = kernel_filename; palmte_binfo.kernel_filename = kernel_filename;
palmte_binfo.kernel_cmdline = kernel_cmdline; palmte_binfo.kernel_cmdline = kernel_cmdline;
palmte_binfo.initrd_filename = initrd_filename; palmte_binfo.initrd_filename = initrd_filename;
arm_load_kernel(cpu->env, &palmte_binfo); arm_load_kernel(&cpu->cpu->env, &palmte_binfo);
} }
/* FIXME: We shouldn't really be doing this here. The LCD controller /* FIXME: We shouldn't really be doing this here. The LCD controller